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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: ItjOJvWp4BzWFI1Kdp2svZtYDlGbNf5zWk5vyVobfr0yWrXuGcAigXsAKqGKkbnwVYseDlNQPe3TKMrBw0VCEs2vthGPkbvSypTgDyi8wFeYzi2Koe4DN3OK+AxsbpIEhIwn7ObPc3bcvRHk+ZnMBoNpgMfacKA1kLgSoMvgWexz4o0ag8EuSR7XG7t9f9XoN+Vl0XyU3kSnIGpID6cvXPL73zyX0vZMt4n/Ik9VWDdI2ljZK7bJOycO0yOo/LxfvAbbzYxCjYxIQ+j2o78tAK06pwe8qQ/Drl26F9i5ridaW3bhCXLAZubADfZr9jw4njiBNgthj7lrLn3NuhoRIBYJJb9fEZ3AIaVLCJM3QOkDstEVsxgpj/UMAkuqr5kXBTpuL8SOww9t5qvB+kuhR+r2R4Z9NdRVMXlT5YI102k= MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: 293abf96-075f-4007-0363-08d746b9cfa1 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Oct 2019 21:53:36.5353 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: x88NzXtKH7dNZFJRPqCEn3lQXqdzogmacEMlSPoq95EOrDOeODy66qwEkokxlJcaB1H7c/brgwQLsrGdGJjPGw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1581 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Use smp_mb__before_atomic() rather than smp_mb__before_llsc() in test_and_set_bit(), test_and_clear_bit() & test_and_change_bit(). The _atomic() versions make semantic sense in these cases, and will allow a later patch to omit redundant barriers for Loongson3 systems that already include a barrier within __test_bit_op(). Signed-off-by: Paul Burton --- Changes in v2: None arch/mips/include/asm/bitops.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index c08b6d225f10..a74769940fbd 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -209,7 +209,7 @@ static inline int test_and_set_bit_lock(unsigned long nr, static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) { - smp_mb__before_llsc(); + smp_mb__before_atomic(); return test_and_set_bit_lock(nr, addr); } @@ -228,7 +228,7 @@ static inline int test_and_clear_bit(unsigned long nr, int bit = nr % BITS_PER_LONG; unsigned long res, orig; - smp_mb__before_llsc(); + smp_mb__before_atomic(); if (!kernel_uses_llsc) { res = __mips_test_and_clear_bit(nr, addr); @@ -265,7 +265,7 @@ static inline int test_and_change_bit(unsigned long nr, int bit = nr % BITS_PER_LONG; unsigned long res, orig; - smp_mb__before_llsc(); + smp_mb__before_atomic(); if (!kernel_uses_llsc) { res = __mips_test_and_change_bit(nr, addr);