| Message ID | 20200113140705.74605-1-jiaxun.yang@flygoat.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/2] MIPS: Define pgprot_dmacoherent according to coherentio status | expand |
On Mon, Jan 13, 2020 at 10:07:04PM +0800, Jiaxun Yang wrote: > For MIPS chips that support coherentio DMA, it's always safe > to make DMA requests cached. For DMA coherent devices pgprot_dmacoherent isn't even used, so this doesn't make sense.
于 2020年1月13日 GMT+08:00 下午10:58:20, Christoph Hellwig <hch@lst.de> 写到: >On Mon, Jan 13, 2020 at 10:07:04PM +0800, Jiaxun Yang wrote: >> For MIPS chips that support coherentio DMA, it's always safe >> to make DMA requests cached. > >For DMA coherent devices pgprot_dmacoherent isn't even used, so this >doesn't make sense. Hi, I'm supposed to use it later in drm/ttm ttm_bo_util to overwrite pgprot for TTM_PL_SYSTEM. And I wish this pgropt can always represent dmacoherent pgropt. Would it be fine? Thanks
On Mon, Jan 13, 2020 at 11:11:58PM +0800, Jiaxun Yang wrote: > > > 于 2020年1月13日 GMT+08:00 下午10:58:20, Christoph Hellwig <hch@lst.de> 写到: > >On Mon, Jan 13, 2020 at 10:07:04PM +0800, Jiaxun Yang wrote: > >> For MIPS chips that support coherentio DMA, it's always safe > >> to make DMA requests cached. > > > >For DMA coherent devices pgprot_dmacoherent isn't even used, so this > >doesn't make sense. > > Hi, > > I'm supposed to use it later in drm/ttm > ttm_bo_util to overwrite pgprot for TTM_PL_SYSTEM. > And I wish this pgropt can always represent dmacoherent pgropt. > Would it be fine? No code outside the core DMA code has any business using pgprot_dmacoherent.
diff --git a/arch/mips/include/asm/dma-coherence.h b/arch/mips/include/asm/dma-coherence.h index 5eaa1fcc878a..bc0df7684cae 100644 --- a/arch/mips/include/asm/dma-coherence.h +++ b/arch/mips/include/asm/dma-coherence.h @@ -9,6 +9,8 @@ #ifndef __ASM_DMA_COHERENCE_H #define __ASM_DMA_COHERENCE_H +#include <asm/pgtable.h> + enum coherent_io_user_state { IO_COHERENCE_DEFAULT, IO_COHERENCE_ENABLED, @@ -35,4 +37,16 @@ static inline bool dev_is_dma_coherent(struct device *dev) #define hw_coherentio 0 #endif /* CONFIG_DMA_MAYBE_COHERENT */ +#if !defined(CONFIG_DMA_PERDEV_COHERENT) +#define pgprot_dmacoherent pgprot_dmacoherent +static inline pgprot_t pgprot_dmacoherent(pgprot_t prot) +{ + if (coherentio == IO_COHERENCE_ENABLED || + (coherentio == IO_COHERENCE_DEFAULT && hw_coherentio)) + return prot; + + return pgprot_noncached(prot); +} +#endif + #endif diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 701f4bc3046f..01f725819df7 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -831,6 +831,7 @@ arch_initcall(debugfs_mips); enum coherent_io_user_state coherentio = IO_COHERENCE_DEFAULT; EXPORT_SYMBOL_GPL(coherentio); int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */ +EXPORT_SYMBOL_GPL(hw_coherentio); static int __init setcoherentio(char *str) {
For MIPS chips that support coherentio DMA, it's always safe to make DMA requests cached. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- arch/mips/include/asm/dma-coherence.h | 14 ++++++++++++++ arch/mips/kernel/setup.c | 1 + 2 files changed, 15 insertions(+)