diff mbox series

[2/4] MIPS: Loongson64: Add GMAC support for Loongson-2K1000

Message ID 20210618025337.5705-2-zhangqing@loongson.cn (mailing list archive)
State Not Applicable
Headers show
Series [1/4] stmmac: pci: Add dwmac support for Loongson | expand

Commit Message

Qing Zhang June 18, 2021, 2:53 a.m. UTC 
The GMAC module is now supported, enable it.

Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
---
 .../boot/dts/loongson/loongson64-2k1000.dtsi  | 46 +++++++++++++++++++
 1 file changed, 46 insertions(+)

Comments

Andrew Lunn June 21, 2021, 2:59 a.m. UTC | #1 
> +			gmac@3,1 {
> +				compatible = "pci0014,7a03.0",
> +						   "pci0014,7a03",
> +						   "pciclass0c0320",
> +						   "pciclass0c03",
> +						   "loongson, pci-gmac";
> +
> +				reg = <0x1900 0x0 0x0 0x0 0x0>;
> +				interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
> +					     <15 IRQ_TYPE_LEVEL_LOW>;
> +				interrupt-names = "macirq", "eth_lpi";
> +				interrupt-parent = <&liointc0>;
> +				phy-mode = "rgmii";

rgmii? But you set PHY_INTERFACE_MODE_GMII?

> +				mdio {
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +					compatible = "snps,dwmac-mdio";
> +					phy1: ethernet-phy@1 {
> +						reg = <0>;

The value after the @ should match the reg value.

    Andrew
diff mbox series

Patch

diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
index 569e814def83..5747f171de29 100644
--- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
@@ -114,6 +114,52 @@  pci@1a000000 {
 			ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000  0x0 0x00010000>,
 				 <0x02000000 0x0 0x40000000 0x0 0x40000000  0x0 0x40000000>;
 
+			gmac@3,0 {
+				compatible = "pci0014,7a03.0",
+						   "pci0014,7a03",
+						   "pciclass0c0320",
+						   "pciclass0c03",
+						   "loongson, pci-gmac";
+
+				reg = <0x1800 0x0 0x0 0x0 0x0>;
+				interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
+					     <13 IRQ_TYPE_LEVEL_LOW>;
+				interrupt-names = "macirq", "eth_lpi";
+				interrupt-parent = <&liointc0>;
+				phy-mode = "rgmii";
+				mdio {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					compatible = "snps,dwmac-mdio";
+					phy0: ethernet-phy@0 {
+						reg = <0>;
+					};
+				};
+			};
+
+			gmac@3,1 {
+				compatible = "pci0014,7a03.0",
+						   "pci0014,7a03",
+						   "pciclass0c0320",
+						   "pciclass0c03",
+						   "loongson, pci-gmac";
+
+				reg = <0x1900 0x0 0x0 0x0 0x0>;
+				interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
+					     <15 IRQ_TYPE_LEVEL_LOW>;
+				interrupt-names = "macirq", "eth_lpi";
+				interrupt-parent = <&liointc0>;
+				phy-mode = "rgmii";
+				mdio {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					compatible = "snps,dwmac-mdio";
+					phy1: ethernet-phy@1 {
+						reg = <0>;
+					};
+				};
+			};
+
 			ehci@4,1 {
 				compatible = "pci0014,7a14.0",
 						   "pci0014,7a14",