diff mbox series

[v2] MIPS: Loongson64: Use three arguments for slti

Message ID 20211208165616.1746108-1-nathan@kernel.org (mailing list archive)
State Accepted
Commit f2c6c22fa83ab2577619009057b3ebcb5305bb03
Headers show
Series [v2] MIPS: Loongson64: Use three arguments for slti | expand

Commit Message

Nathan Chancellor Dec. 8, 2021, 4:56 p.m. UTC
LLVM's integrated assembler does not support 'slti <reg>, <imm>':

<instantiation>:16:12: error: invalid operand for instruction
 slti $12, (0x6300 | 0x0008)
           ^
arch/mips/kernel/head.S:86:2: note: while in macro instantiation
 kernel_entry_setup # cpu specific setup
 ^
<instantiation>:16:12: error: invalid operand for instruction
 slti $12, (0x6300 | 0x0008)
           ^
arch/mips/kernel/head.S:150:2: note: while in macro instantiation
 smp_slave_setup
 ^

To increase compatibility with LLVM's integrated assembler, use the full
form of 'slti <reg>, <reg>, <imm>', which matches the rest of
arch/mips/. This does not result in any change for GNU as.

Link: https://github.com/ClangBuiltLinux/linux/issues/1526
Reported-by: Ryutaroh Matsumoto <ryutaroh@ict.e.titech.ac.jp>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
---

v1 -> v2: https://lore.kernel.org/r/20211207170129.578089-1-nathan@kernel.org/

* Fix typos in commit message ("stli" -> "slti") [Sergey]

 arch/mips/include/asm/mach-loongson64/kernel-entry-init.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)


base-commit: 0fcfb00b28c0b7884635dacf38e46d60bf3d4eb1

Comments

Thomas Bogendoerfer Dec. 9, 2021, 9:31 a.m. UTC | #1
On Wed, Dec 08, 2021 at 09:56:17AM -0700, Nathan Chancellor wrote:
> LLVM's integrated assembler does not support 'slti <reg>, <imm>':
> 
> <instantiation>:16:12: error: invalid operand for instruction
>  slti $12, (0x6300 | 0x0008)
>            ^
> arch/mips/kernel/head.S:86:2: note: while in macro instantiation
>  kernel_entry_setup # cpu specific setup
>  ^
> <instantiation>:16:12: error: invalid operand for instruction
>  slti $12, (0x6300 | 0x0008)
>            ^
> arch/mips/kernel/head.S:150:2: note: while in macro instantiation
>  smp_slave_setup
>  ^
> 
> To increase compatibility with LLVM's integrated assembler, use the full
> form of 'slti <reg>, <reg>, <imm>', which matches the rest of
> arch/mips/. This does not result in any change for GNU as.
> 
> Link: https://github.com/ClangBuiltLinux/linux/issues/1526
> Reported-by: Ryutaroh Matsumoto <ryutaroh@ict.e.titech.ac.jp>
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
> ---
> 
> v1 -> v2: https://lore.kernel.org/r/20211207170129.578089-1-nathan@kernel.org/
> 
> * Fix typos in commit message ("stli" -> "slti") [Sergey]
> 
>  arch/mips/include/asm/mach-loongson64/kernel-entry-init.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

applied to mips-next.

Thomas.
diff mbox series

Patch

diff --git a/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h
index 13373c5144f8..efb41b351974 100644
--- a/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h
@@ -32,7 +32,7 @@ 
 	nop
 	/* Loongson-3A R2/R3 */
 	andi	t0, (PRID_IMP_MASK | PRID_REV_MASK)
-	slti	t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
+	slti	t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
 	bnez	t0, 2f
 	nop
 1:
@@ -63,7 +63,7 @@ 
 	nop
 	/* Loongson-3A R2/R3 */
 	andi	t0, (PRID_IMP_MASK | PRID_REV_MASK)
-	slti	t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
+	slti	t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
 	bnez	t0, 2f
 	nop
 1: