From patchwork Tue Feb 1 15:05:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 12731813 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A86FC433EF for ; Tue, 1 Feb 2022 15:07:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239832AbiBAPHY (ORCPT ); Tue, 1 Feb 2022 10:07:24 -0500 Received: from ams.source.kernel.org ([145.40.68.75]:59376 "EHLO ams.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239929AbiBAPHR (ORCPT ); Tue, 1 Feb 2022 10:07:17 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 84F55B82E40; Tue, 1 Feb 2022 15:07:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 56523C340EB; Tue, 1 Feb 2022 15:07:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1643728034; bh=1OBxWZHG831M1SPbV5jBb3+7JNwP6F1nuWQ1Actjs/I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vEF+6PbTK4CgyskQVbXgAKAXFPuraXewLZTXYlM+Z5DgpaGFBcLuczyKz5+zjLbp3 amtv+YcofWhUs+oz8EeHVzqbBZnGJ2dCSNYcV14G8ruL7Tujvj1PNo3pzYdbJ3qzXu i4j+lI4e61pTb/lKJG7x86Lumvf8IQf/gT2u49mNi2kHlaxD5580PPPUTStFr+JuYA 0eWMAwSYgP+E/8dPhx/N4xZiVRLNsl+C1Tqx2lDXTmJpA/wVFDcmtv+RpLc9Av/OI7 c9BI1AyleRQGsEbC7SPUn88WD2I6p/+qfLlS2a1GbkW3rjeL2V1Rh25RVLOBWG7C63 gSTHWP7WFi9ow== From: guoren@kernel.org To: guoren@kernel.org, palmer@dabbelt.com, arnd@arndb.de, anup@brainfault.org, gregkh@linuxfoundation.org, liush@allwinnertech.com, wefu@redhat.com, drew@beagleboard.org, wangjunqiang@iscas.ac.cn, hch@lst.de Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-csky@vger.kernel.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-parisc@vger.kernel.org, linux-mips@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, Guo Ren Subject: [PATCH V5 12/21] riscv: compat: syscall: Add entry.S implementation Date: Tue, 1 Feb 2022 23:05:36 +0800 Message-Id: <20220201150545.1512822-13-guoren@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220201150545.1512822-1-guoren@kernel.org> References: <20220201150545.1512822-1-guoren@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Guo Ren Implement the entry of compat_sys_call_table[] in asm. Ref to riscv-privileged spec 4.1.1 Supervisor Status Register (sstatus): BIT[32:33] = UXL[1:0]: - 1:32 - 2:64 - 3:128 Signed-off-by: Guo Ren Signed-off-by: Guo Ren Cc: Arnd Bergmann Cc: Palmer Dabbelt Reviewed-by: Palmer Dabbelt --- arch/riscv/include/asm/csr.h | 7 +++++++ arch/riscv/kernel/entry.S | 18 ++++++++++++++++-- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index ae711692eec9..eed96fa62d66 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -36,6 +36,13 @@ #define SR_SD _AC(0x8000000000000000, UL) /* FS/XS dirty */ #endif +#ifdef CONFIG_COMPAT +#define SR_UXL _AC(0x300000000, UL) /* XLEN mask for U-mode */ +#define SR_UXL_32 _AC(0x100000000, UL) /* XLEN = 32 for U-mode */ +#define SR_UXL_64 _AC(0x200000000, UL) /* XLEN = 64 for U-mode */ +#define SR_UXL_SHIFT 32 +#endif + /* SATP flags */ #ifndef CONFIG_64BIT #define SATP_PPN _AC(0x003FFFFF, UL) diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index ed29e9c8f660..1951743f09b3 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -207,13 +207,27 @@ check_syscall_nr: * Syscall number held in a7. * If syscall number is above allowed value, redirect to ni_syscall. */ - bgeu a7, t0, 1f + bgeu a7, t0, 3f +#ifdef CONFIG_COMPAT + REG_L s0, PT_STATUS(sp) + srli s0, s0, SR_UXL_SHIFT + andi s0, s0, (SR_UXL >> SR_UXL_SHIFT) + li t0, (SR_UXL_32 >> SR_UXL_SHIFT) + sub t0, s0, t0 + bnez t0, 1f + + /* Call compat_syscall */ + la s0, compat_sys_call_table + j 2f +1: +#endif /* Call syscall */ la s0, sys_call_table +2: slli t0, a7, RISCV_LGPTR add s0, s0, t0 REG_L s0, 0(s0) -1: +3: jalr s0 ret_from_syscall: