From patchwork Tue Apr 5 07:13:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 12801073 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54AA3C4707A for ; Tue, 5 Apr 2022 07:15:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231465AbiDEHRC (ORCPT ); Tue, 5 Apr 2022 03:17:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57250 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231603AbiDEHQ3 (ORCPT ); Tue, 5 Apr 2022 03:16:29 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2925101B; Tue, 5 Apr 2022 00:14:30 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5E8DA615FB; Tue, 5 Apr 2022 07:14:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E76F5C34112; Tue, 5 Apr 2022 07:14:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1649142869; bh=e4dJybM58H7ucR3l1EiaumQDiYHocLzSiDptBO8ijKQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WmsrWnVOUyIcrS5tWmU2iLmLp8+3hogXxjSjaasBNqPEpKn1S9WL7KGSvnuB1yTnl HwEfhvkMYvuJvsM2lIyICdPfR8jHFJtLvelW9VDhhxenHhBqFj/FWesorVursc1ekD 2sJeroWj4+mCRIHvSRmc30RSy1fB+rc2v5CphlIjiozFVbzqFKmwdATqYkSoZvUqA9 fjc2r6798Zt0qx8UMVUod8s2bUb3L+OQY5Hs1rOaFf5ts7q9Ww1TDmQQKoMjGCiCtp UQjMsnDYUcvSIF1XcAXumGoqtMQomiimurskMZYLNrpnmiktl7fBc9BO/7P2pEx+em +29Vqav9TibyA== From: guoren@kernel.org To: guoren@kernel.org, palmer@dabbelt.com, arnd@arndb.de, gregkh@linuxfoundation.org, hch@lst.de, nathan@kernel.org, naresh.kamboju@linaro.org Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-parisc@vger.kernel.org, linux-mips@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, heiko@sntech.de, Guo Ren Subject: [PATCH V12 10/20] riscv: compat: Support TASK_SIZE for compat mode Date: Tue, 5 Apr 2022 15:13:04 +0800 Message-Id: <20220405071314.3225832-11-guoren@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220405071314.3225832-1-guoren@kernel.org> References: <20220405071314.3225832-1-guoren@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Guo Ren Make TASK_SIZE from const to dynamic detect TIF_32BIT flag function. Refer to arm64 to implement DEFAULT_MAP_WINDOW_64 for efi-stub. Limit 32-bit compatible process in 0-2GB virtual address range (which is enough for real scenarios), because it could avoid address sign extend problem when 32-bit enter 64-bit and ease software design. The standard 32-bit TASK_SIZE is 0x9dc00000:FIXADDR_START, and compared to a compatible 32-bit, it increases 476MB for the application's virtual address. Signed-off-by: Guo Ren Signed-off-by: Guo Ren Reviewed-by: Arnd Bergmann Tested-by: Heiko Stuebner --- arch/riscv/include/asm/pgtable.h | 13 +++++++++++-- arch/riscv/include/asm/processor.h | 6 +++++- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 046b44225623..e32d75fef068 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -707,8 +707,17 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma, * 63–48 all equal to bit 47, or else a page-fault exception will occur." */ #ifdef CONFIG_64BIT -#define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2) -#define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2) +#define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2) +#define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2) + +#ifdef CONFIG_COMPAT +#define TASK_SIZE_32 (_AC(0x80000000, UL) - PAGE_SIZE) +#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ + TASK_SIZE_32 : TASK_SIZE_64) +#else +#define TASK_SIZE TASK_SIZE_64 +#endif + #else #define TASK_SIZE FIXADDR_START #define TASK_SIZE_MIN TASK_SIZE diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index 0749924d9e55..21c8072dce17 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -19,7 +19,11 @@ #define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) #define STACK_TOP TASK_SIZE -#define STACK_TOP_MAX STACK_TOP +#ifdef CONFIG_64BIT +#define STACK_TOP_MAX TASK_SIZE_64 +#else +#define STACK_TOP_MAX TASK_SIZE +#endif #define STACK_ALIGN 16 #ifndef __ASSEMBLY__