From patchwork Wed Mar 1 10:22:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baoquan He X-Patchwork-Id: 13155802 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A04C1C64ED6 for ; Wed, 1 Mar 2023 10:23:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229713AbjCAKXR (ORCPT ); Wed, 1 Mar 2023 05:23:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229632AbjCAKXL (ORCPT ); Wed, 1 Mar 2023 05:23:11 -0500 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 021283B3C1 for ; Wed, 1 Mar 2023 02:22:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1677666145; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=q+2djVSvldfSahdORfv588Sx4RfUpN9M2v3A+79Xsag=; b=WBi81jfcn48YXaTRqrwq/eBC24y9PThMYKcM8EYdQcXYNxu8riHt68zg5SGJVUHl29rtJV DND0Jbdhb2URXowNZsZ+GvfH1fmoeLg7/DBX18WOi9Dx+g5Ukmz6DbxyhXdfKSBZhfx7XD ffR+k/RnZXNJMyVPde1xMqQua+Y8VHg= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-583-doUGhHLUP6WD_lcTWKfTgA-1; Wed, 01 Mar 2023 05:22:21 -0500 X-MC-Unique: doUGhHLUP6WD_lcTWKfTgA-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id A706585A5B1; Wed, 1 Mar 2023 10:22:20 +0000 (UTC) Received: from MiWiFi-R3L-srv.redhat.com (ovpn-13-180.pek2.redhat.com [10.72.13.180]) by smtp.corp.redhat.com (Postfix) with ESMTP id 088FB492C14; Wed, 1 Mar 2023 10:22:15 +0000 (UTC) From: Baoquan He To: linux-kernel@vger.kernel.org Cc: linux-arch@vger.kernel.org, linux-mm@kvack.org, arnd@arndb.de, geert@linux-m68k.org, hch@infradead.org, mcgrof@kernel.org, Baoquan He , Thomas Bogendoerfer , Huacai Chen , Jiaxun Yang , linux-mips@vger.kernel.org Subject: [PATCH v2 1/2] mips: add including Date: Wed, 1 Mar 2023 18:22:07 +0800 Message-Id: <20230301102208.148490-2-bhe@redhat.com> In-Reply-To: <20230301102208.148490-1-bhe@redhat.com> References: <20230301102208.148490-1-bhe@redhat.com> MIME-Version: 1.0 Content-type: text/plain X-Scanned-By: MIMEDefang 3.1 on 10.11.54.9 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org With the adding, some default ioremap_xx methods defined in asm-generic/io.h can be used. E.g the default ioremap_uc() returning NULL. Here, remove the including in asm/mmiowb.h, otherwise nested including will cause compiling error. Signed-off-by: Baoquan He Cc: Thomas Bogendoerfer Cc: Huacai Chen Cc: Jiaxun Yang Cc: linux-mips@vger.kernel.org Reviewed-by: Arnd Bergmann --- arch/mips/include/asm/io.h | 46 ++++++++++++++++++++++++++++++++++ arch/mips/include/asm/mmiowb.h | 2 -- 2 files changed, 46 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index cec8347f0b85..3737b48f37dd 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -126,6 +126,7 @@ static inline phys_addr_t virt_to_phys(const volatile void *x) * almost all conceivable cases a device driver should not be using * this function */ +#define phys_to_virt phys_to_virt static inline void * phys_to_virt(unsigned long address) { return __va(address); @@ -480,14 +481,17 @@ BUILDSTRING(l, u32) BUILDSTRING(q, u64) #endif +#define memset_io memset_io static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) { memset((void __force *) addr, val, count); } +#define memcpy_fromio memcpy_fromio static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) { memcpy(dst, (void __force *) src, count); } +#define memcpy_toio memcpy_toio static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) { memcpy((void __force *) dst, src, count); @@ -548,6 +552,46 @@ extern void (*_dma_cache_inv)(unsigned long start, unsigned long size); #define csr_out32(v, a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v)) #define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST)) + +#define inb_p inb_p +#define inw_p inw_p +#define inl_p inl_p +#define insb insb +#define insw insw +#define insl insl + +#define outb_p outb_p +#define outw_p outw_p +#define outl_p outl_p +#define outsb outsb +#define outsw outsw +#define outsl outsl + +#define readb readb +#define readw readw +#define readl readl +#define writeb writeb +#define writew writew +#define writel writel + +#define readsb readsb +#define readsw readsw +#define readsl readsl +#define readsq readsq +#define writesb writesb +#define writesw writesw +#define writesl writesl +#define writesq writesq + +#define __raw_readb __raw_readb +#define __raw_readw __raw_readw +#define __raw_readl __raw_readl +#define __raw_readq __raw_readq +#define __raw_writeb __raw_writeb +#define __raw_writew __raw_writew +#define __raw_writel __raw_writel +#define __raw_writeq __raw_writeq + /* * Convert a physical pointer to a virtual kernel pointer for /dev/mem * access @@ -556,4 +600,6 @@ extern void (*_dma_cache_inv)(unsigned long start, unsigned long size); void __ioread64_copy(void *to, const void __iomem *from, size_t count); +#include + #endif /* _ASM_IO_H */ diff --git a/arch/mips/include/asm/mmiowb.h b/arch/mips/include/asm/mmiowb.h index a40824e3ef8e..007fe55bc7d1 100644 --- a/arch/mips/include/asm/mmiowb.h +++ b/arch/mips/include/asm/mmiowb.h @@ -2,8 +2,6 @@ #ifndef _ASM_MMIOWB_H #define _ASM_MMIOWB_H -#include - #define mmiowb() iobarrier_w() #include