From patchwork Tue Mar 21 10:48:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 13182563 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05414C74A5B for ; Tue, 21 Mar 2023 10:49:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230408AbjCUKtY (ORCPT ); Tue, 21 Mar 2023 06:49:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229657AbjCUKtU (ORCPT ); Tue, 21 Mar 2023 06:49:20 -0400 Received: from wout3-smtp.messagingengine.com (wout3-smtp.messagingengine.com [64.147.123.19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F094ACC29 for ; Tue, 21 Mar 2023 03:49:09 -0700 (PDT) Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailout.west.internal (Postfix) with ESMTP id 82EA83200C5B; Tue, 21 Mar 2023 06:49:08 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Tue, 21 Mar 2023 06:49:08 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flygoat.com; h= cc:cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm3; t=1679395748; x= 1679482148; bh=eAsPTvVEioK0QszbY/FDpc0oedKcpD+iJBaaQUCaDB4=; b=3 ghdxPSh4r8qyremRyB9Q5/8JtofCv4CzpDnStzv7glQTQGJsO54sF5Je+X7AEPtE AEUMwKQBSkUfAnoXHijFKwnXUJazsCDU2fN2vtohvIs3anMfd8h1HcdqWOZ91UER +OrVIVYpgD2dg8cQ55ffGtNgojAheqPIZ8vxZe/CZp2OmtrXHuAV7XM5Z44kwzCr POteH8VTG0WflZ9knRUvRYDlmA0OgdnLbMogZnhvMlgQgkiMbhYSivEpuIjw9Cex tdHsGCS7j2j0gMTPia1nzWcNtd7CjdgZWWAFI7ew1wEWyMxtdAgV62/hjam1E6CD A9yPCM/XfMBn85Byh2Ghg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1679395748; x= 1679482148; bh=eAsPTvVEioK0QszbY/FDpc0oedKcpD+iJBaaQUCaDB4=; b=h V3R2qvs37wUJfenvO6xjYYywW9SUaHDwDSVp4vDDBEUm7W7DJmTxqcGg8Qy4Ftrp BrdlAFMP19r4fHM9FUsWpgAel3wm+K20joXIlBXYrUHTs+I+yVi1cbgEt0kqPOjM 1PfGvbblcozPfhQyiQN59DZ/GdgvsILieQJTG6A9sKiN28Q+WssbQ/k3TJ4q+OLX +kYDxpGlMBTM2B5WS9OpqrpCa7CDjgX3HqjkDqacYB+r3EuhSd9wZux2Xos/YHRz tp3dJ+xfzoCy1q1BX1huPomxBK82FQU0XX88vqwCfg8MzdyNfip9/du7vBHxQNTo dV7qUnkDcYCQDkq7+bcfg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrvdegtddgvddtucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvfevufffkffojghfggfgsedtke ertdertddtnecuhfhrohhmpeflihgrgihunhcujggrnhhguceojhhirgiguhhnrdihrghn ghesfhhlhihgohgrthdrtghomheqnecuggftrfgrthhtvghrnhepfeeludefheegvdeuvd dvgeekgfdvtdettdelieeihfegtedugeekhfdvhfejfedtnecuvehluhhsthgvrhfuihii vgeptdenucfrrghrrghmpehmrghilhhfrhhomhepjhhirgiguhhnrdihrghnghesfhhlhi hgohgrthdrtghomh X-ME-Proxy: Feedback-ID: ifd894703:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 21 Mar 2023 06:49:07 -0400 (EDT) From: Jiaxun Yang To: linux-mips@vger.kernel.org Cc: tsbogend@alpha.franken.de, philmd@linaro.org, sergei.shtylyov@gmail.com, aleksander.lobakin@intel.com, Jiaxun Yang Subject: [PATCH v2 04/12] MIPS: Octeon: Opt-out 4k_cache feature Date: Tue, 21 Mar 2023 10:48:44 +0000 Message-Id: <20230321104852.25284-5-jiaxun.yang@flygoat.com> X-Mailer: git-send-email 2.37.1 (Apple Git-137.1) In-Reply-To: <20230321104852.25284-1-jiaxun.yang@flygoat.com> References: <20230321104852.25284-1-jiaxun.yang@flygoat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Octeon has a different cache interface with traditional R4K one, just opt-out this flag for octeon to avoid run R4K cache initialization code accidentally. Also remove ISA level assumption for 4k cache. Signed-off-by: Jiaxun Yang --- arch/mips/include/asm/cpu-features.h | 2 +- arch/mips/kernel/cpu-probe.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index c0983130a44c..c613426b0bfc 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -118,7 +118,7 @@ #define cpu_has_3k_cache __isa_lt_and_opt(1, MIPS_CPU_3K_CACHE) #endif #ifndef cpu_has_4k_cache -#define cpu_has_4k_cache __isa_ge_or_opt(1, MIPS_CPU_4K_CACHE) +#define cpu_has_4k_cache __opt(MIPS_CPU_4K_CACHE) #endif #ifndef cpu_has_octeon_cache #define cpu_has_octeon_cache 0 diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 7ddf07f255f3..6d15a398d389 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1602,6 +1602,8 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) { decode_configs(c); + /* Octeon has different cache interface */ + c->options &= ~MIPS_CPU_4K_CACHE; switch (c->processor_id & PRID_IMP_MASK) { case PRID_IMP_CAVIUM_CN38XX: case PRID_IMP_CAVIUM_CN31XX: