diff mbox series

[2/3] MIPS: Introduce config options for LLSC availability

Message ID 20230519164753.72065-3-jiaxun.yang@flygoat.com (mailing list archive)
State Changes Requested
Headers show
Series MIPS: Enable ARCH_SUPPORTS_ATOMIC_RMW | expand

Commit Message

Jiaxun Yang May 19, 2023, 4:47 p.m. UTC 
Introduce CPU_HAS_LLSC and CPU_MAY_HAVE_LLSC to determine availability
of LLSC and Kconfig level.

They are both true for almost all supported CPUs besides:

R3000: Doesn't have LLSC, so both false.
R5000 series: LLSC is unusable for 64bit kernel, so both false.
R10000: Some platforms decided to opt-out LLSC due to errata, so only
	select CPU_MAY_HAVE_LLSC.
WAR_4KC_LLSC: LLSC is buggy on certain reversion, which can be detected
	at cpu-probe or platform override, so only select CPU_MAY_HAVE_LLSC.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/Kconfig                    | 20 ++++++++++++++++++++
 arch/mips/include/asm/cpu-features.h |  7 ++++++-
 2 files changed, 26 insertions(+), 1 deletion(-)

Comments

Maciej W. Rozycki May 19, 2023, 8:30 p.m. UTC | #1 
On Fri, 19 May 2023, Jiaxun Yang wrote:

> --- a/arch/mips/include/asm/cpu-features.h
> +++ b/arch/mips/include/asm/cpu-features.h
> @@ -185,8 +185,13 @@
>  #ifndef cpu_has_ejtag
>  #define cpu_has_ejtag		__opt(MIPS_CPU_EJTAG)
>  #endif
> +
>  #ifndef cpu_has_llsc
> -#define cpu_has_llsc		__isa_ge_or_opt(1, MIPS_CPU_LLSC)
> +# ifdef CONFIG_CPU_MAY_HAVE_LLSC
> +#  define cpu_has_llsc		(IS_ENABLED(CONFIG_CPU_HAS_LLSC) ||  __opt(MIPS_CPU_LLSC))

 Extraneous space and overlong line here.

  Maciej
diff mbox series

Patch

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 354d033364ad..85728e4703bd 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1539,6 +1539,7 @@  config CPU_R3000
 config CPU_R4300
 	bool "R4300"
 	depends on SYS_HAS_CPU_R4300
+	select CPU_HAS_LLSC
 	select CPU_SUPPORTS_32BIT_KERNEL
 	select CPU_SUPPORTS_64BIT_KERNEL
 	help
@@ -1547,6 +1548,7 @@  config CPU_R4300
 config CPU_R4X00
 	bool "R4x00"
 	depends on SYS_HAS_CPU_R4X00
+	select CPU_HAS_LLSC
 	select CPU_SUPPORTS_32BIT_KERNEL
 	select CPU_SUPPORTS_64BIT_KERNEL
 	select CPU_SUPPORTS_HUGEPAGES
@@ -1557,6 +1559,7 @@  config CPU_R4X00
 config CPU_TX49XX
 	bool "R49XX"
 	depends on SYS_HAS_CPU_TX49XX
+	select CPU_HAS_LLSC
 	select CPU_HAS_PREFETCH
 	select CPU_SUPPORTS_32BIT_KERNEL
 	select CPU_SUPPORTS_64BIT_KERNEL
@@ -1565,6 +1568,7 @@  config CPU_TX49XX
 config CPU_R5000
 	bool "R5000"
 	depends on SYS_HAS_CPU_R5000
+	select CPU_HAS_LLSC if !64BIT
 	select CPU_SUPPORTS_32BIT_KERNEL
 	select CPU_SUPPORTS_64BIT_KERNEL
 	select CPU_SUPPORTS_HUGEPAGES
@@ -1574,6 +1578,7 @@  config CPU_R5000
 config CPU_R5500
 	bool "R5500"
 	depends on SYS_HAS_CPU_R5500
+	select CPU_HAS_LLSC
 	select CPU_SUPPORTS_32BIT_KERNEL
 	select CPU_SUPPORTS_64BIT_KERNEL
 	select CPU_SUPPORTS_HUGEPAGES
@@ -1584,6 +1589,7 @@  config CPU_R5500
 config CPU_NEVADA
 	bool "RM52xx"
 	depends on SYS_HAS_CPU_NEVADA
+	select CPU_HAS_LLSC if !64BIT
 	select CPU_SUPPORTS_32BIT_KERNEL
 	select CPU_SUPPORTS_64BIT_KERNEL
 	select CPU_SUPPORTS_HUGEPAGES
@@ -1593,6 +1599,8 @@  config CPU_NEVADA
 config CPU_R10000
 	bool "R10000"
 	depends on SYS_HAS_CPU_R10000
+	select CPU_HAS_LLSC if !WAR_R10000_LLSC
+	select CPU_MAY_HAVE_LLSC
 	select CPU_HAS_PREFETCH
 	select CPU_SUPPORTS_32BIT_KERNEL
 	select CPU_SUPPORTS_64BIT_KERNEL
@@ -1604,6 +1612,7 @@  config CPU_R10000
 config CPU_RM7000
 	bool "RM7000"
 	depends on SYS_HAS_CPU_RM7000
+	select CPU_HAS_LLSC
 	select CPU_HAS_PREFETCH
 	select CPU_SUPPORTS_32BIT_KERNEL
 	select CPU_SUPPORTS_64BIT_KERNEL
@@ -1613,6 +1622,7 @@  config CPU_RM7000
 config CPU_SB1
 	bool "SB1"
 	depends on SYS_HAS_CPU_SB1
+	select CPU_HAS_LLSC
 	select CPU_SUPPORTS_32BIT_KERNEL
 	select CPU_SUPPORTS_64BIT_KERNEL
 	select CPU_SUPPORTS_HIGHMEM
@@ -1645,6 +1655,7 @@  config CPU_BMIPS
 	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
 	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
 	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
+	select CPU_HAS_LLSC
 	select CPU_SUPPORTS_32BIT_KERNEL
 	select DMA_NONCOHERENT
 	select IRQ_MIPS_CPU
@@ -2382,6 +2393,15 @@  config CPU_DIEI_BROKEN
 config CPU_HAS_RIXI
 	bool
 
+# For CPU that must have LLSC
+config CPU_HAS_LLSC
+	def_bool TARGET_ISA_REV > 0 && !WAR_4KC_LLSC
+	select CPU_MAY_HAVE_LLSC
+
+# For CPU that LLSC support is optional
+config CPU_MAY_HAVE_LLSC
+	def_bool TARGET_ISA_REV > 0
+
 config CPU_NO_LOAD_STORE_LR
 	bool
 	help
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 51a1737b03d0..2a0b90077b50 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -185,8 +185,13 @@ 
 #ifndef cpu_has_ejtag
 #define cpu_has_ejtag		__opt(MIPS_CPU_EJTAG)
 #endif
+
 #ifndef cpu_has_llsc
-#define cpu_has_llsc		__isa_ge_or_opt(1, MIPS_CPU_LLSC)
+# ifdef CONFIG_CPU_MAY_HAVE_LLSC
+#  define cpu_has_llsc		(IS_ENABLED(CONFIG_CPU_HAS_LLSC) ||  __opt(MIPS_CPU_LLSC))
+# else
+#  define cpu_has_llsc		0
+# endif
 #endif
 #ifndef kernel_uses_llsc
 #define kernel_uses_llsc	cpu_has_llsc