| Message ID | 20230917103753.52644-1-arinc.unal@arinc9.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | b44ae980e9d026c41101d97cf96c0eb09d490b35 |
| Headers | show |
| Series | mips: dts: ralink: mt7621: define each reset as an item | expand |
On Sun, Sep 17, 2023 at 12:38 PM Arınç ÜNAL <arinc.unal@arinc9.com> wrote: > > Each item of the resets property should define a reset. Split the item with > two resets on the ethernet node into two separate items. > > Sort the items of the clocks property to the same line as a trivial change. > > Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> > --- > arch/mips/boot/dts/ralink/mt7621.dtsi | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Thanks, Sergio Paracuellos
On Sun, Sep 17, 2023 at 01:37:53PM +0300, Arınç ÜNAL wrote: > Each item of the resets property should define a reset. Split the item with > two resets on the ethernet node into two separate items. > > Sort the items of the clocks property to the same line as a trivial change. > > Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> > --- > arch/mips/boot/dts/ralink/mt7621.dtsi | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi > index 7caed0d14f11..35a10258f235 100644 > --- a/arch/mips/boot/dts/ralink/mt7621.dtsi > +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi > @@ -300,14 +300,13 @@ ethernet: ethernet@1e100000 { > compatible = "mediatek,mt7621-eth"; > reg = <0x1e100000 0x10000>; > > - clocks = <&sysc MT7621_CLK_FE>, > - <&sysc MT7621_CLK_ETH>; > + clocks = <&sysc MT7621_CLK_FE>, <&sysc MT7621_CLK_ETH>; > clock-names = "fe", "ethif"; > > #address-cells = <1>; > #size-cells = <0>; > > - resets = <&sysc MT7621_RST_FE &sysc MT7621_RST_ETH>; > + resets = <&sysc MT7621_RST_FE>, <&sysc MT7621_RST_ETH>; > reset-names = "fe", "eth"; > > interrupt-parent = <&gic>; > -- > 2.39.2 > applied to mips-next. Thomas.
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi index 7caed0d14f11..35a10258f235 100644 --- a/arch/mips/boot/dts/ralink/mt7621.dtsi +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi @@ -300,14 +300,13 @@ ethernet: ethernet@1e100000 { compatible = "mediatek,mt7621-eth"; reg = <0x1e100000 0x10000>; - clocks = <&sysc MT7621_CLK_FE>, - <&sysc MT7621_CLK_ETH>; + clocks = <&sysc MT7621_CLK_FE>, <&sysc MT7621_CLK_ETH>; clock-names = "fe", "ethif"; #address-cells = <1>; #size-cells = <0>; - resets = <&sysc MT7621_RST_FE &sysc MT7621_RST_ETH>; + resets = <&sysc MT7621_RST_FE>, <&sysc MT7621_RST_ETH>; reset-names = "fe", "eth"; interrupt-parent = <&gic>;
Each item of the resets property should define a reset. Split the item with two resets on the ethernet node into two separate items. Sort the items of the clocks property to the same line as a trivial change. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> --- arch/mips/boot/dts/ralink/mt7621.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)