diff mbox series

[v2,2/3] mips: dts: ralink: mt7621: reorder serial0 properties

Message ID 20240307190408.23443-2-justin.swartz@risingedge.co.za (mailing list archive)
State Superseded
Headers show
Series [v2,1/3] mips: dts: ralink: mt7621: associate uart1_pins with serial0 | expand

Commit Message

Justin Swartz March 7, 2024, 7:04 p.m. UTC 
Reorder serial0 properties according to the guidelines laid
out in Documentation/devicetree/bindings/dts-coding-style.rst

Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
---
 arch/mips/boot/dts/ralink/mt7621.dtsi | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

--

Comments

Sergio Paracuellos March 8, 2024, 7:29 a.m. UTC | #1 
On Thu, Mar 7, 2024 at 8:05 PM Justin Swartz
<justin.swartz@risingedge.co.za> wrote:
>
> Reorder serial0 properties according to the guidelines laid
> out in Documentation/devicetree/bindings/dts-coding-style.rst
>
> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
> ---
>  arch/mips/boot/dts/ralink/mt7621.dtsi | 8 ++------
>  1 file changed, 2 insertions(+), 6 deletions(-)

Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>

Thanks,
    Sergio Paracuellos
AngeloGioacchino Del Regno March 8, 2024, 8:42 a.m. UTC | #2 
Il 07/03/24 20:04, Justin Swartz ha scritto:
> Reorder serial0 properties according to the guidelines laid
> out in Documentation/devicetree/bindings/dts-coding-style.rst
> 
> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff mbox series

Patch

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index dca415fdd..3ad4e2343 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -114,16 +114,12 @@  memc: memory-controller@5000 {
 		serial0: serial@c00 {
 			compatible = "ns16550a";
 			reg = <0xc00 0x100>;
-
+			reg-io-width = <4>;
+			reg-shift = <2>;
 			clocks = <&sysc MT7621_CLK_UART1>;
-
 			interrupt-parent = <&gic>;
 			interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
-
-			reg-shift = <2>;
-			reg-io-width = <4>;
 			no-loopback-test;
-
 			pinctrl-names = "default";
 			pinctrl-0 = <&uart1_pins>;
 		};