@@ -3630,7 +3630,7 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
oob_required,
page);
else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
- !oob)
+ !NAND_HAS_MONOLITHIC_READ(chip) && !oob)
ret = chip->ecc.read_subpage(chip, col, bytes,
bufpoi, page);
else
@@ -3648,7 +3648,8 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from,
* partial pages or when a bounce buffer is required.
*/
if (use_bounce_buf) {
- if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
+ if ((!NAND_HAS_SUBPAGE_READ(chip) ||
+ NAND_HAS_MONOLITHIC_READ(chip)) && !oob &&
!(mtd->ecc_stats.failed - ecc_stats.failed) &&
(ops->mode != MTD_OPS_RAW)) {
chip->pagecache.page = realpage;
@@ -150,6 +150,11 @@ struct gpio_desc;
/* Device needs 3rd row address cycle */
#define NAND_ROW_ADDR_3 BIT(14)
+/* Device supports monolithic reads */
+#define NAND_MONOLITHIC_READ BIT(15)
+/* Macros to identify the above */
+#define NAND_HAS_MONOLITHIC_READ(chip) ((chip->options & NAND_MONOLITHIC_READ))
+
/* Non chip related options */
/* This option skips the bbt scan during initialization. */
#define NAND_SKIP_BBTSCAN BIT(16)