diff mbox series

[v4,14/14] mips: FDC driver refactor

Message ID 20240511104341.151550-15-aleksandar.rikalo@syrmia.com (mailing list archive)
State Superseded
Headers show
Series MIPS: Support I6500 multi-cluster configuration | expand

Commit Message

Aleksandar Rikalo May 11, 2024, 10:43 a.m. UTC 
Separate the FDC driver code into two parts, common and
mips-specific.

No functional impact.

Signed-off-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
Signed-off-by: Djordje Todorovic <djordje.todorovic@syrmia.com>
---
 drivers/tty/mips_fdc/Makefile         |  2 +
 drivers/tty/mips_fdc/ejtag-fdc-mips.c | 29 ++++++++++++
 drivers/tty/mips_fdc/ejtag-fdc.c      | 66 +++------------------------
 drivers/tty/mips_fdc/ejtag-fdc.h      | 55 ++++++++++++++++++++++
 4 files changed, 93 insertions(+), 59 deletions(-)
 create mode 100644 drivers/tty/mips_fdc/ejtag-fdc-mips.c
 create mode 100644 drivers/tty/mips_fdc/ejtag-fdc.h
diff mbox series

Patch

diff --git a/drivers/tty/mips_fdc/Makefile b/drivers/tty/mips_fdc/Makefile
index 03b2781e1090..9e0894a8b342 100644
--- a/drivers/tty/mips_fdc/Makefile
+++ b/drivers/tty/mips_fdc/Makefile
@@ -1,2 +1,4 @@ 
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_MIPS_EJTAG_FDC_TTY) += ejtag-fdc.o
+
+obj-$(CONFIG_MIPS) += ejtag-fdc-mips.o
diff --git a/drivers/tty/mips_fdc/ejtag-fdc-mips.c b/drivers/tty/mips_fdc/ejtag-fdc-mips.c
new file mode 100644
index 000000000000..3942ee818f0b
--- /dev/null
+++ b/drivers/tty/mips_fdc/ejtag-fdc-mips.c
@@ -0,0 +1,29 @@ 
+// SPDX-License-Identifier: GPL-2.0
+
+#include "ejtag-fdc.h"
+
+void __iomem *get_fdc_regs(void)
+{
+	return mips_cdmm_early_probe(0xfd);
+}
+
+int is_fdc_interrupt(void)
+{
+	return read_c0_cause() & CAUSEF_FDCI;
+}
+
+static const struct mips_cdmm_device_id mips_ejtag_fdc_tty_ids[] = {
+	{ .type = 0xfd },
+	{ }
+};
+
+static struct mips_cdmm_driver mips_ejtag_fdc_tty_driver = {
+	.drv		= {
+		.name	= "mips_ejtag_fdc",
+	},
+	.probe		= mips_ejtag_fdc_tty_probe,
+	.cpu_down	= mips_ejtag_fdc_tty_cpu_down,
+	.cpu_up		= mips_ejtag_fdc_tty_cpu_up,
+	.id_table	= mips_ejtag_fdc_tty_ids,
+};
+builtin_mips_cdmm_driver(mips_ejtag_fdc_tty_driver);
diff --git a/drivers/tty/mips_fdc/ejtag-fdc.c b/drivers/tty/mips_fdc/ejtag-fdc.c
index afbf7738c7c4..fecd96118019 100644
--- a/drivers/tty/mips_fdc/ejtag-fdc.c
+++ b/drivers/tty/mips_fdc/ejtag-fdc.c
@@ -28,45 +28,9 @@ 
 #include <linux/tty_flip.h>
 #include <linux/uaccess.h>
 
-#include <asm/cdmm.h>
 #include <asm/irq.h>
 
-/* Register offsets */
-#define REG_FDACSR	0x00	/* FDC Access Control and Status Register */
-#define REG_FDCFG	0x08	/* FDC Configuration Register */
-#define REG_FDSTAT	0x10	/* FDC Status Register */
-#define REG_FDRX	0x18	/* FDC Receive Register */
-#define REG_FDTX(N)	(0x20+0x8*(N))	/* FDC Transmit Register n (0..15) */
-
-/* Register fields */
-
-#define REG_FDCFG_TXINTTHRES_SHIFT	18
-#define REG_FDCFG_TXINTTHRES		(0x3 << REG_FDCFG_TXINTTHRES_SHIFT)
-#define REG_FDCFG_TXINTTHRES_DISABLED	(0x0 << REG_FDCFG_TXINTTHRES_SHIFT)
-#define REG_FDCFG_TXINTTHRES_EMPTY	(0x1 << REG_FDCFG_TXINTTHRES_SHIFT)
-#define REG_FDCFG_TXINTTHRES_NOTFULL	(0x2 << REG_FDCFG_TXINTTHRES_SHIFT)
-#define REG_FDCFG_TXINTTHRES_NEAREMPTY	(0x3 << REG_FDCFG_TXINTTHRES_SHIFT)
-#define REG_FDCFG_RXINTTHRES_SHIFT	16
-#define REG_FDCFG_RXINTTHRES		(0x3 << REG_FDCFG_RXINTTHRES_SHIFT)
-#define REG_FDCFG_RXINTTHRES_DISABLED	(0x0 << REG_FDCFG_RXINTTHRES_SHIFT)
-#define REG_FDCFG_RXINTTHRES_FULL	(0x1 << REG_FDCFG_RXINTTHRES_SHIFT)
-#define REG_FDCFG_RXINTTHRES_NOTEMPTY	(0x2 << REG_FDCFG_RXINTTHRES_SHIFT)
-#define REG_FDCFG_RXINTTHRES_NEARFULL	(0x3 << REG_FDCFG_RXINTTHRES_SHIFT)
-#define REG_FDCFG_TXFIFOSIZE_SHIFT	8
-#define REG_FDCFG_TXFIFOSIZE		(0xff << REG_FDCFG_TXFIFOSIZE_SHIFT)
-#define REG_FDCFG_RXFIFOSIZE_SHIFT	0
-#define REG_FDCFG_RXFIFOSIZE		(0xff << REG_FDCFG_RXFIFOSIZE_SHIFT)
-
-#define REG_FDSTAT_TXCOUNT_SHIFT	24
-#define REG_FDSTAT_TXCOUNT		(0xff << REG_FDSTAT_TXCOUNT_SHIFT)
-#define REG_FDSTAT_RXCOUNT_SHIFT	16
-#define REG_FDSTAT_RXCOUNT		(0xff << REG_FDSTAT_RXCOUNT_SHIFT)
-#define REG_FDSTAT_RXCHAN_SHIFT		4
-#define REG_FDSTAT_RXCHAN		(0xf << REG_FDSTAT_RXCHAN_SHIFT)
-#define REG_FDSTAT_RXE			BIT(3)	/* Rx Empty */
-#define REG_FDSTAT_RXF			BIT(2)	/* Rx Full */
-#define REG_FDSTAT_TXE			BIT(1)	/* Tx Empty */
-#define REG_FDSTAT_TXF			BIT(0)	/* Tx Full */
+#include "ejtag-fdc.h"
 
 /* Default channel for the early console */
 #define CONSOLE_CHANNEL      1
@@ -375,7 +339,7 @@  static int __init mips_ejtag_fdc_console_init(struct mips_ejtag_fdc_console *c)
 	if (c->initialised)
 		goto out;
 	/* Look for the FDC device */
-	regs = mips_cdmm_early_probe(0xfd);
+	regs = get_fdc_regs();
 	if (IS_ERR(regs)) {
 		ret = PTR_ERR(regs);
 		goto out;
@@ -664,7 +628,7 @@  static irqreturn_t mips_ejtag_fdc_isr(int irq, void *dev_id)
 		return IRQ_NONE;
 
 	/* If no FDC interrupt pending, it wasn't for us */
-	if (!(read_c0_cause() & CAUSEF_FDCI))
+	if (!is_fdc_interrupt())
 		return IRQ_NONE;
 
 	mips_ejtag_fdc_handle(priv);
@@ -882,7 +846,7 @@  int __weak get_c0_fdc_int(void)
 	return -1;
 }
 
-static int mips_ejtag_fdc_tty_probe(struct mips_cdmm_device *dev)
+int mips_ejtag_fdc_tty_probe(struct mips_cdmm_device *dev)
 {
 	int ret, nport;
 	struct mips_ejtag_fdc_tty_port *dport;
@@ -1045,7 +1009,7 @@  static int mips_ejtag_fdc_tty_probe(struct mips_cdmm_device *dev)
 	return ret;
 }
 
-static int mips_ejtag_fdc_tty_cpu_down(struct mips_cdmm_device *dev)
+int mips_ejtag_fdc_tty_cpu_down(struct mips_cdmm_device *dev)
 {
 	struct mips_ejtag_fdc_tty *priv = mips_cdmm_get_drvdata(dev);
 	unsigned int cfg;
@@ -1068,7 +1032,7 @@  static int mips_ejtag_fdc_tty_cpu_down(struct mips_cdmm_device *dev)
 	return 0;
 }
 
-static int mips_ejtag_fdc_tty_cpu_up(struct mips_cdmm_device *dev)
+int mips_ejtag_fdc_tty_cpu_up(struct mips_cdmm_device *dev)
 {
 	struct mips_ejtag_fdc_tty *priv = mips_cdmm_get_drvdata(dev);
 	unsigned int cfg;
@@ -1106,22 +1070,6 @@  static int mips_ejtag_fdc_tty_cpu_up(struct mips_cdmm_device *dev)
 	return ret;
 }
 
-static const struct mips_cdmm_device_id mips_ejtag_fdc_tty_ids[] = {
-	{ .type = 0xfd },
-	{ }
-};
-
-static struct mips_cdmm_driver mips_ejtag_fdc_tty_driver = {
-	.drv		= {
-		.name	= "mips_ejtag_fdc",
-	},
-	.probe		= mips_ejtag_fdc_tty_probe,
-	.cpu_down	= mips_ejtag_fdc_tty_cpu_down,
-	.cpu_up		= mips_ejtag_fdc_tty_cpu_up,
-	.id_table	= mips_ejtag_fdc_tty_ids,
-};
-builtin_mips_cdmm_driver(mips_ejtag_fdc_tty_driver);
-
 static int __init mips_ejtag_fdc_init_console(void)
 {
 	return mips_ejtag_fdc_console_init(&mips_ejtag_fdc_con);
@@ -1166,7 +1114,7 @@  static void __iomem *kgdbfdc_setup(void)
 	regs = mips_ejtag_fdc_con.regs[cpu];
 	/* First console output on this CPU? */
 	if (!regs) {
-		regs = mips_cdmm_early_probe(0xfd);
+		regs = get_fdc_regs();
 		mips_ejtag_fdc_con.regs[cpu] = regs;
 	}
 	/* Already tried and failed to find FDC on this CPU? */
diff --git a/drivers/tty/mips_fdc/ejtag-fdc.h b/drivers/tty/mips_fdc/ejtag-fdc.h
new file mode 100644
index 000000000000..62e8fbe1b614
--- /dev/null
+++ b/drivers/tty/mips_fdc/ejtag-fdc.h
@@ -0,0 +1,55 @@ 
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * TTY driver for MIPS EJTAG Fast Debug Channels.
+ *
+ * Copyright (C) 2007-2015 Imagination Technologies Ltd
+ */
+
+#ifndef __EJTAG_FDC_H
+#define __EJTAG_FDC_H
+
+#include <asm/cdmm.h>
+
+/* Register offsets */
+#define REG_FDACSR	0x00	/* FDC Access Control and Status Register */
+#define REG_FDCFG	0x08	/* FDC Configuration Register */
+#define REG_FDSTAT	0x10	/* FDC Status Register */
+#define REG_FDRX	0x18	/* FDC Receive Register */
+#define REG_FDTX(N)	(0x20+0x8*(N))	/* FDC Transmit Register n (0..15) */
+
+/* Register fields */
+#define REG_FDCFG_TXINTTHRES_SHIFT	18
+#define REG_FDCFG_TXINTTHRES		(0x3 << REG_FDCFG_TXINTTHRES_SHIFT)
+#define REG_FDCFG_TXINTTHRES_DISABLED	(0x0 << REG_FDCFG_TXINTTHRES_SHIFT)
+#define REG_FDCFG_TXINTTHRES_EMPTY	(0x1 << REG_FDCFG_TXINTTHRES_SHIFT)
+#define REG_FDCFG_TXINTTHRES_NOTFULL	(0x2 << REG_FDCFG_TXINTTHRES_SHIFT)
+#define REG_FDCFG_TXINTTHRES_NEAREMPTY	(0x3 << REG_FDCFG_TXINTTHRES_SHIFT)
+#define REG_FDCFG_RXINTTHRES_SHIFT	16
+#define REG_FDCFG_RXINTTHRES		(0x3 << REG_FDCFG_RXINTTHRES_SHIFT)
+#define REG_FDCFG_RXINTTHRES_DISABLED	(0x0 << REG_FDCFG_RXINTTHRES_SHIFT)
+#define REG_FDCFG_RXINTTHRES_FULL	(0x1 << REG_FDCFG_RXINTTHRES_SHIFT)
+#define REG_FDCFG_RXINTTHRES_NOTEMPTY	(0x2 << REG_FDCFG_RXINTTHRES_SHIFT)
+#define REG_FDCFG_RXINTTHRES_NEARFULL	(0x3 << REG_FDCFG_RXINTTHRES_SHIFT)
+#define REG_FDCFG_TXFIFOSIZE_SHIFT	8
+#define REG_FDCFG_TXFIFOSIZE		(0xff << REG_FDCFG_TXFIFOSIZE_SHIFT)
+#define REG_FDCFG_RXFIFOSIZE_SHIFT	0
+#define REG_FDCFG_RXFIFOSIZE		(0xff << REG_FDCFG_RXFIFOSIZE_SHIFT)
+
+#define REG_FDSTAT_TXCOUNT_SHIFT	24
+#define REG_FDSTAT_TXCOUNT		(0xff << REG_FDSTAT_TXCOUNT_SHIFT)
+#define REG_FDSTAT_RXCOUNT_SHIFT	16
+#define REG_FDSTAT_RXCOUNT		(0xff << REG_FDSTAT_RXCOUNT_SHIFT)
+#define REG_FDSTAT_RXCHAN_SHIFT		4
+#define REG_FDSTAT_RXCHAN		(0xf << REG_FDSTAT_RXCHAN_SHIFT)
+#define REG_FDSTAT_RXE			BIT(3)	/* Rx Empty */
+#define REG_FDSTAT_RXF			BIT(2)	/* Rx Full */
+#define REG_FDSTAT_TXE			BIT(1)	/* Tx Empty */
+#define REG_FDSTAT_TXF			BIT(0)	/* Tx Full */
+
+void __iomem *get_fdc_regs(void);
+int is_fdc_interrupt(void);
+int mips_ejtag_fdc_tty_probe(struct mips_cdmm_device *dev);
+int mips_ejtag_fdc_tty_cpu_down(struct mips_cdmm_device *dev);
+int mips_ejtag_fdc_tty_cpu_up(struct mips_cdmm_device *dev);
+
+#endif /* __EJTAG_FDC_H */