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Wed, 12 Jun 2024 06:09:02 -0400 (EDT) From: Jiaxun Yang Date: Wed, 12 Jun 2024 11:08:57 +0100 Subject: [PATCH v2 5/6] dt-bindings: mips: Document mti,mips-cm Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240612-cm_probe-v2-5-a5b55440563c@flygoat.com> References: <20240612-cm_probe-v2-0-a5b55440563c@flygoat.com> In-Reply-To: <20240612-cm_probe-v2-0-a5b55440563c@flygoat.com> To: Paul Burton , Thomas Bogendoerfer , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Serge Semin , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1574; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=sbSJhTfOx3HavJNSfDwxJoXfvXqGiYes3a+DaHL/Wb8=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrTM4m1aW57M/ajW/juq+GLlnrfNgQvS3rOKNWSuLpVO2 nN78RLmjlIWBjEuBlkxRZYQAaW+DY0XF1x/kPUHZg4rE8gQBi5OAZiIejTD//CXIranRXoUPe/c DZy8blPZX23Fc7+rdz5buPPiC0dp1xRGhnlXO0JYFe/fXcfNVSewQU7xk3vR1HWNbS+nTPJruVs iwQAA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Add devicetree binding documentation for MIPS Coherence Manager. Signed-off-by: Jiaxun Yang Reviewed-by: Conor Dooley --- v2: - Better wording for register desc - cm -> coherency-manager - schema matches compatible --- .../devicetree/bindings/mips/mti,mips-cm.yaml | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml new file mode 100644 index 000000000000..9f500804737d --- /dev/null +++ b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/mti,mips-cm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MIPS Coherence Manager + +description: | + Defines a location of the MIPS Coherence Manager registers. + +maintainers: + - Jiaxun Yang + +properties: + compatible: + const: mti,mips-cm + + reg: + description: + Base address and size of an unoccupied region in system's MMIO address + space, which will be used to map the MIPS CM global control registers + block. It is conventionally decided by the system integrator. + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + coherency-manager@1fbf8000 { + compatible = "mti,mips-cm"; + reg = <0x1bde8000 0x8000>; + }; +...