Message ID | 20240706-config-refresh-v1-1-5dba0064cf08@flygoat.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | MIPS: Refresh some configs | expand |
在2024年7月6日七月 下午1:07,Jiaxun Yang写道: > All MIPS64R6 cores so far supports MSA and vz, so it makes sense > to enable them in 64R6 default config. > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > arch/mips/configs/generic/64r6.config | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/mips/configs/generic/64r6.config > b/arch/mips/configs/generic/64r6.config > index 5dd8e8503e34..2a2036abdd2d 100644 > --- a/arch/mips/configs/generic/64r6.config > +++ b/arch/mips/configs/generic/64r6.config > @@ -3,4 +3,6 @@ CONFIG_64BIT=y > CONFIG_MIPS32_O32=y > CONFIG_MIPS32_N32=y > > +CONIFG_CPU_HAS_MSA=y ^ Ouch, typo here when I copy changes back from my build machine. Will respin after initial review. Thanks > CONFIG_CRYPTO_CRC32_MIPS=y > +CONFIG_VIRTUALIZATION=y > > -- > 2.45.2
diff --git a/arch/mips/configs/generic/64r6.config b/arch/mips/configs/generic/64r6.config index 5dd8e8503e34..2a2036abdd2d 100644 --- a/arch/mips/configs/generic/64r6.config +++ b/arch/mips/configs/generic/64r6.config @@ -3,4 +3,6 @@ CONFIG_64BIT=y CONFIG_MIPS32_O32=y CONFIG_MIPS32_N32=y +CONIFG_CPU_HAS_MSA=y CONFIG_CRYPTO_CRC32_MIPS=y +CONFIG_VIRTUALIZATION=y
All MIPS64R6 cores so far supports MSA and vz, so it makes sense to enable them in 64R6 default config. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- arch/mips/configs/generic/64r6.config | 2 ++ 1 file changed, 2 insertions(+)