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[2/4] MIPS: config: generic: Add board-litex

Message ID 20240706-config-refresh-v1-2-5dba0064cf08@flygoat.com (mailing list archive)
State Superseded
Headers show
Series MIPS: Refresh some configs | expand

Commit Message

Jiaxun Yang July 6, 2024, 5:07 a.m. UTC 
The LiteX framework provides a convenient and efficient infrastructure
to create FPGA Cores/SoCs.

We have implemented LiteX support for a couple of opensource MIPS
CPU cores including microAptiv UP from MIPS, GS232 from Loongson,
and CDIM from CQU.

For this platform, devicetree is generated by litex python scripts
so there is no devicetree addition necessary.

Link: https://github.com/enjoy-digital/litex/pull/1990
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/configs/generic/board-litex.config | 8 ++++++++
 1 file changed, 8 insertions(+)
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Patch

diff --git a/arch/mips/configs/generic/board-litex.config b/arch/mips/configs/generic/board-litex.config
new file mode 100644
index 000000000000..f372d0647bfc
--- /dev/null
+++ b/arch/mips/configs/generic/board-litex.config
@@ -0,0 +1,8 @@ 
+CONFIG_LITEX_LITEETH=y
+CONFIG_SERIAL_LITEUART=y
+CONFIG_SERIAL_LITEUART_CONSOLE=y
+CONFIG_MMC=y
+CONFIG_MMC_LITEX=y
+CONFIG_LITEX_SOC_CONTROLLER=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y