| Message ID | 20240711082656.1889440-5-arikalo@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | MIPS: Support I6500 multi-cluster configuration | expand |
Hi Aleksandar, kernel test robot noticed the following build warnings: [auto build test WARNING on tip/irq/core] [also build test WARNING on tip/timers/core linus/master v6.10-rc7] [cannot apply to daniel-lezcano/clockevents/next next-20240711] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Aleksandar-Rikalo/MIPS-CPS-Add-a-couple-of-multi-cluster-utility-functions/20240711-164850 base: tip/irq/core patch link: https://lore.kernel.org/r/20240711082656.1889440-5-arikalo%40gmail.com patch subject: [PATCH v5 04/11] irqchip/mips-gic: Support multi-cluster in for_each_online_cpu_gic() config: mips-allnoconfig (https://download.01.org/0day-ci/archive/20240712/202407121224.kUAil6pa-lkp@intel.com/config) compiler: mips-linux-gcc (GCC) 14.1.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240712/202407121224.kUAil6pa-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202407121224.kUAil6pa-lkp@intel.com/ All warnings (new ones prefixed by >>): >> drivers/irqchip/irq-mips-gic.c:102: warning: expecting prototype for for_each_online_cpu_gic(). Prototype was for gic_unlock_cluster() instead vim +102 drivers/irqchip/irq-mips-gic.c 90 91 /** 92 * for_each_online_cpu_gic() - Iterate over online CPUs, access local registers 93 * @cpu: An integer variable to hold the current CPU number 94 * @gic_lock: A pointer to raw spin lock used as a guard 95 * 96 * Iterate over online CPUs & configure the other/redirect register region to 97 * access each CPUs GIC local register block, which can be accessed from the 98 * loop body using read_gic_vo_*() or write_gic_vo_*() accessor functions or 99 * their derivatives. 100 */ 101 static inline void gic_unlock_cluster(void) > 102 { 103 if (mips_cps_multicluster_cpus()) 104 mips_cm_unlock_other(); 105 } 106
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index 6c7a7d2f0438..e7358d3f4e74 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -98,10 +98,17 @@ static int __gic_with_next_online_cpu(int prev) * loop body using read_gic_vo_*() or write_gic_vo_*() accessor functions or * their derivatives. */ +static inline void gic_unlock_cluster(void) +{ + if (mips_cps_multicluster_cpus()) + mips_cm_unlock_other(); +} + #define for_each_online_cpu_gic(cpu, gic_lock) \ guard(raw_spinlock_irqsave)(gic_lock); \ for ((cpu) = __gic_with_next_online_cpu(-1); \ (cpu) < nr_cpu_ids; \ + gic_unlock_cluster(), \ (cpu) = __gic_with_next_online_cpu(cpu)) static void gic_clear_pcpu_masks(unsigned int intr)