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AJvYcCWXQhgqXDbHAWRxDqv+DkdAgRQxLacKepxjCqX7aEcerdt0aV0bAZNUotOAjeJ3dVRnb4AMUaAJq95wzg==@vger.kernel.org, AJvYcCWZ1MNje70s1vzZSzzkUPIOpdkTm5bCqmBJHfZtw6SPyYFWCzkKeCsL1PiIrcvCRNKgu+5LT9JqUMdGKue7@vger.kernel.org, AJvYcCXDlnDqvoNKtbPN/NGMz+2MJ2pUw434fvM4SP3XnHzcdJnhvYm1qMbOWKz4j5RiABOkf7lxEwq3uzro@vger.kernel.org X-Gm-Message-State: AOJu0YxRrt0wMccEwkQfbx+ZPagr1hXRJQkKlbKPkXuwUK0+orKg/1Ed 0QCI1ffDFpV/JWjwglPKIjMH7Xii8rx3pnGybtYK0GtWxSlIEXD+ X-Google-Smtp-Source: AGHT+IE9G5kZr2VnQdi3oJ5fK9NfyoYvvRFAnLjyDDKECkhSiYMPXb7MozsNPe9M9cfg9spN/dDNoQ== X-Received: by 2002:a17:906:794f:b0:a9a:4597:a7f3 with SMTP id a640c23a62f3a-a9de619876amr929630166b.62.1730138404031; Mon, 28 Oct 2024 11:00:04 -0700 (PDT) Received: from localhost.localdomain ([79.175.114.8]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9b1dfbdfe2sm396990766b.36.2024.10.28.11.00.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 11:00:02 -0700 (PDT) From: Aleksandar Rikalo To: Thomas Bogendoerfer Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vladimir Kondratiev , Gregory CLEMENT , Theo Lebrun , Arnd Bergmann , devicetree@vger.kernel.org, Djordje Todorovic , Chao-ying Fu , Daniel Lezcano , Geert Uytterhoeven , Greg Ungerer , Hauke Mehrtens , Ilya Lipnitskiy , Jiaxun Yang , linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Marc Zyngier , Paul Burton , Peter Zijlstra , Serge Semin , Tiezhu Yang , Aleksandar Rikalo Subject: [PATCH v8 12/13] MIPS: mobileye: dts: eyeq6h: Enable cluster support Date: Mon, 28 Oct 2024 18:59:34 +0100 Message-Id: <20241028175935.51250-13-arikalo@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241028175935.51250-1-arikalo@gmail.com> References: <20241028175935.51250-1-arikalo@gmail.com> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Gregory CLEMENT The CM3.5 device used in EyeQ6H SoCs incorrectly reports the status for Hardware Cache Initialization (HCI). This commit adds a property to acknowledge this issue, which enables the use of the second CPU cluster. Signed-off-by: Gregory CLEMENT Signed-off-by: Aleksandar Rikalo Tested-by: Gregory CLEMENT --- arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi index 1db3c3cda2e3..4ea85dfd4eed 100644 --- a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi @@ -18,6 +18,7 @@ cpu@0 { compatible = "img,i6500"; reg = <0>; clocks = <&occ_cpu>; + cm3-l2-config-hci-broken; }; };