From patchwork Sun Mar 29 17:35:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 11464115 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2427414B4 for ; Sun, 29 Mar 2020 17:36:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 02F4E20842 for ; Sun, 29 Mar 2020 17:36:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=goldelico.com header.i=@goldelico.com header.b="J6h027Vn" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728493AbgC2RgO (ORCPT ); Sun, 29 Mar 2020 13:36:14 -0400 Received: from mo4-p03-ob.smtp.rzone.de ([85.215.255.101]:13040 "EHLO mo4-p03-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727933AbgC2RgL (ORCPT ); Sun, 29 Mar 2020 13:36:11 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1585503369; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: X-RZG-CLASS-ID:X-RZG-AUTH:From:Subject:Sender; bh=q969EphFXv0KGrhdAiGCS2+PMGXFbeBIe9i3fa3YlIU=; b=J6h027VnQLR29/lz4Cyp/WIYy/UW+zsxWd1mnVqhH5ctVr/UrhExAMuG/E4uvLI//f sRx5Vtmvo/aIhuzuiDjUe3VGK4BTC/5eDxDLtzZ9HOPQ/HA81e8mnThl1cvetBieSRhR 45NPW0fccLvfEaudFGb/IjQODYdjkrLeyzcKsr/SsSgFUKINwp3bEysxvDTQlX3d9e/0 KSzGXuDWU318RJoSbu55olafntPcVJed4eGAXFmbcwP4n3Bxm8IVEApCozslRDYdWV9z R4AdpPOJptFr3fqDwtT8OCRCMEbzwZEd8UQxBPzvAMr/aCM/uz98Gn3NIFzuYJfhoYng I39A== X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o12DNOsPj0pDz2rsNxxv" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 46.2.1 DYNA|AUTH) with ESMTPSA id m02241w2THa1BMF (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Sun, 29 Mar 2020 19:36:01 +0200 (CEST) From: "H. Nikolaus Schaller" To: Paul Cercueil , Paul Boddie , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , Linus Walleij , Andi Kleen , Krzysztof Kozlowski , Geert Uytterhoeven , "Eric W. Biederman" , "H. Nikolaus Schaller" , Miquel Raynal , Thomas Bogendoerfer , Kees Cook Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org, letux-kernel@openphoenux.org, mips-creator-ci20-dev@googlegroups.com Subject: [RFC v3 6/8] MIPS: DTS: jz4780: account for Synopsys HDMI driver and LCD controller Date: Sun, 29 Mar 2020 19:35:52 +0200 Message-Id: <62c975f7de965181e1e44eb85e01ab60a645453b.1585503354.git.hns@goldelico.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Paul Boddie A specialisation of the generic Synopsys HDMI driver is employed for JZ4780 HDMI support. This requires a new driver, plus device tree and configuration modifications. Signed-off-by: Paul Boddie Signed-off-by: H. Nikolaus Schaller --- arch/mips/boot/dts/ingenic/jz4780.dtsi | 46 ++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index bb89653d16a3..73776514bbe5 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -434,4 +434,50 @@ bch: bch@134d0000 { status = "disabled"; }; + + hdmi: hdmi@10180000 { + compatible = "ingenic,jz4780-dw-hdmi"; + reg = <0x10180000 0x8000>; + reg-io-width = <4>; + + clocks = <&cgu JZ4780_CLK_HDMI>, <&cgu JZ4780_CLK_AHB0>; + clock-names = "isfr" , "iahb"; + + assigned-clocks = <&cgu JZ4780_CLK_HDMI>; + assigned-clock-rates = <27000000>; + + interrupt-parent = <&intc>; + interrupts = <3>; + + /* ddc-i2c-bus = <&i2c4>; */ + + status = "disabled"; + }; + + lcdc0: lcdc0@13050000 { + compatible = "ingenic,jz4780-lcd"; + reg = <0x13050000 0x1800>; + + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>; + clock-names = "lcd", "lcd_pclk"; + + interrupt-parent = <&intc>; + interrupts = <31>; + + status = "disabled"; + }; + + lcdc1: lcdc1@130a0000 { + compatible = "ingenic,jz4780-lcd"; + reg = <0x130a0000 0x1800>; + + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>; + clock-names = "lcd", "lcd_pclk"; + + interrupt-parent = <&intc>; + interrupts = <31>; + + status = "disabled"; + }; + };