From patchwork Wed Jun 27 14:29:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiri Pirko X-Patchwork-Id: 10491811 X-Patchwork-Delegate: idosch@idosch.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EA78160375 for ; Wed, 27 Jun 2018 14:32:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D82D5293A0 for ; Wed, 27 Jun 2018 14:32:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CCEE4293F0; Wed, 27 Jun 2018 14:32:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 04714293CC for ; Wed, 27 Jun 2018 14:32:21 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 41G5371CTPzF1Kh for ; Thu, 28 Jun 2018 00:32:19 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=resnulli.us Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=resnulli-us.20150623.gappssmtp.com header.i=@resnulli-us.20150623.gappssmtp.com header.b="SzRNXCCl"; dkim-atps=neutral X-Original-To: linux-mlxsw@lists.ozlabs.org Delivered-To: linux-mlxsw@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=resnulli.us (client-ip=2a00:1450:400c:c0c::244; helo=mail-wr0-x244.google.com; envelope-from=jiri@resnulli.us; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=resnulli.us Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=resnulli-us.20150623.gappssmtp.com header.i=@resnulli-us.20150623.gappssmtp.com header.b="SzRNXCCl"; dkim-atps=neutral Received: from mail-wr0-x244.google.com (mail-wr0-x244.google.com [IPv6:2a00:1450:400c:c0c::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 41G50s10K5zF1D5 for ; Thu, 28 Jun 2018 00:30:18 +1000 (AEST) Received: by mail-wr0-x244.google.com with SMTP id f16-v6so2278749wrm.3 for ; Wed, 27 Jun 2018 07:30:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=resnulli-us.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OaP7mr+ZQWEaZvFrlEuiB0YyKa3VM9fQQ0K/aGokOBA=; b=SzRNXCCltp2P+q75eT0ZTg3fj3XhWWqMs/f2idcsw+g+/mr7+0LkdhIEwfNAFiqvUd CBtt7R7ikPR5J3VrXNgO2XdEdEqCCZbfjH6ntFMQtbB0H4F4MPNYeR0eHHs0QzBp4Fls n/3Vw6WIgRxcvTU2lnC6beu4Ka+pw+lvb6Gy4rGxr+0NdWwDoBmPFn9SWES9iNoUvvEo 2EL0gBrPtPHjO/6drnjZ9QBbkVgKmTJ9lPpNlYPd9fm4GRw/YQFH5DWmzYckDGeYfx9A v5R5op6sj9Hpxl60QYGPnqrkDKw86NNSDaoSv24+HUMqvrkrYmmnIwJIW2WN82Pu4FQQ HMCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OaP7mr+ZQWEaZvFrlEuiB0YyKa3VM9fQQ0K/aGokOBA=; b=IvcR1943cBxpS9g9TKr1bIXVHPlQa8bdRk01r0MpIrKfIP5yLONjMv9+Z4nl0bECpn 35bt01jQryLlBUQT5nHGvgSLVCx5VyOFYWTl8aTwm2BoAnwDuo/iLeOnCH0Ts9zXeSn4 jUStSnlt4EiahXou7Hr6SrkInUO8/hD5NJZK31GeqOogl56VMZ0FO3v9ca6C2xXhTToH jg/HLzi3RMRB/Xsl5BOtVylOivpIQ4HtghFPYki1FGaCIFcmeGEgNA2v9c9TQv0KexXU Mymu5XUkFJuq6c30nRK/U2ajXEuffJJTN+kaG4z3e23QlQlzeYjySALr0JMP1VUCOsY7 fOlw== X-Gm-Message-State: APt69E2pFRIGhg6Gsuk+sUtDbGiYE5ahrXaFbaURcw/X4xmCrG+f5lnN 7EjP9t8UOXA4Sh954zBkadHa8A== X-Google-Smtp-Source: AAOMgpdITN/nBNC/PZ54C/UXwYpA3RN4Vb8SLNN2yRsJyegSGY0b+REMjqDq0GPxRlFX/0Z3A6D5Jg== X-Received: by 2002:adf:abf7:: with SMTP id s110-v6mr5688136wrc.101.1530109815945; Wed, 27 Jun 2018 07:30:15 -0700 (PDT) Received: from localhost ([213.175.37.12]) by smtp.gmail.com with ESMTPSA id k12-v6sm6191702wrr.40.2018.06.27.07.30.15 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 27 Jun 2018 07:30:15 -0700 (PDT) From: Jiri Pirko To: linux-internal@mellanox.com Subject: [patch net-next/mlxsw internal v2 09/15] mlxsw: reg: Add Policy-Engine Region Configuration Register Date: Wed, 27 Jun 2018 16:29:59 +0200 Message-Id: <20180627143005.2016-10-jiri@resnulli.us> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180627143005.2016-1-jiri@resnulli.us> References: <20180627143005.2016-1-jiri@resnulli.us> X-BeenThere: linux-mlxsw@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: mlxsw driver development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linux-mlxsw-bounces+patchwork-linux-mlxsw=patchwork.kernel.org@lists.ozlabs.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ido Schimmel The PERCR register configures the region parameters such as whether to consult the bloom filter before performing a lookup using a specific eRP. For C-TCAM only usage we don't need to accurately set the master mask. Instead, we can set all of its bits to make sure all the extracted keys are actually used. Signed-off-by: Ido Schimmel Signed-off-by: Jiri Pirko --- drivers/net/ethernet/mellanox/mlxsw/reg.h | 57 +++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h index 3bf6c6b721b9..d4ff254cd7a2 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h @@ -2536,6 +2536,62 @@ static inline void mlxsw_reg_perar_pack(char *payload, bool inkbr, mlxsw_reg_perar_hw_region_set(payload, hw_region); } +/* PERCR - Policy-Engine Region Configuration Register + * --------------------------------------------------- + * This register configures the region parameters. The region_id must be + * allocated. + */ +#define MLXSW_REG_PERCR_ID 0x302A +#define MLXSW_REG_PERCR_LEN 0x80 + +MLXSW_REG_DEFINE(percr, MLXSW_REG_PERCR_ID, MLXSW_REG_PERCR_LEN); + +/* reg_percr_region_id + * Region identifier. + * Range 0..cap_max_regions-1 + * Access: Index + */ +MLXSW_ITEM32(reg, percr, region_id, 0x00, 0, 16); + +/* reg_percr_atcam_ignore_prune + * Ignore prune_vector by other A-TCAM rules. Used e.g., for a new rule. + * Access: RW + */ +MLXSW_ITEM32(reg, percr, atcam_ignore_prune, 0x04, 25, 1); + +/* reg_percr_ctcam_ignore_prune + * Ignore prune_ctcam by other A-TCAM rules. Used e.g., for a new rule. + * Access: RW + */ +MLXSW_ITEM32(reg, percr, ctcam_ignore_prune, 0x04, 24, 1); + +/* reg_percr_bf_bypass + * Bloom filter bypass. + * 0 - Bloom filter is used (default) + * 1 - Bloom filter is bypassed. The bypass is an OR condition of + * region_id or eRP. See PERPT.bf_bypass + * Access: RW + */ +MLXSW_ITEM32(reg, percr, bf_bypass, 0x04, 16, 1); + +/* reg_percr_master_mask + * Master mask. Logical OR mask of all masks of all rules of a region + * (both A-TCAM and C-TCAM). When there are no eRPs + * (erpt_pointer_valid = 0), then this provides the mask. + * Access: RW + */ +MLXSW_ITEM_BUF(reg, percr, master_mask, 0x20, 96); + +static inline void mlxsw_reg_percr_pack(char *payload, u16 region_id) +{ + MLXSW_REG_ZERO(percr, payload); + mlxsw_reg_percr_region_id_set(payload, region_id); + mlxsw_reg_percr_atcam_ignore_prune_set(payload, false); + mlxsw_reg_percr_ctcam_ignore_prune_set(payload, false); + mlxsw_reg_percr_bf_bypass_set(payload, true); + memset(payload + 0x20, 0xff, 96); +} + /* IEDR - Infrastructure Entry Delete Register * ---------------------------------------------------- * This register is used for deleting entries from the entry tables. @@ -8036,6 +8092,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = { MLXSW_REG(pefa), MLXSW_REG(ptce2), MLXSW_REG(perar), + MLXSW_REG(percr), MLXSW_REG(iedr), MLXSW_REG(qpcr), MLXSW_REG(qtct),