From patchwork Wed Feb 26 18:05:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Catalin Marinas X-Patchwork-Id: 11406887 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3F6AC14B4 for ; Wed, 26 Feb 2020 18:05:39 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 0755920732 for ; Wed, 26 Feb 2020 18:05:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0755920732 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 498676B0032; Wed, 26 Feb 2020 13:05:38 -0500 (EST) Delivered-To: linux-mm-outgoing@kvack.org Received: by kanga.kvack.org (Postfix, from userid 40) id 422E56B0036; Wed, 26 Feb 2020 13:05:38 -0500 (EST) X-Original-To: int-list-linux-mm@kvack.org X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 339386B0037; Wed, 26 Feb 2020 13:05:38 -0500 (EST) X-Original-To: linux-mm@kvack.org X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0175.hostedemail.com [216.40.44.175]) by kanga.kvack.org (Postfix) with ESMTP id 19B1E6B0032 for ; Wed, 26 Feb 2020 13:05:38 -0500 (EST) Received: from smtpin23.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay01.hostedemail.com (Postfix) with ESMTP id 0902E180AD801 for ; Wed, 26 Feb 2020 18:05:38 +0000 (UTC) X-FDA: 76533055914.23.bead20_311843bf99f2f X-Spam-Summary: 2,0,0,86fa71352da6d946,d41d8cd98f00b204,catalin.marinas@arm.com,,RULES_HIT:2:41:355:379:541:800:967:973:982:988:989:1260:1261:1311:1314:1345:1437:1515:1535:1605:1730:1747:1777:1792:1801:2194:2196:2198:2199:2200:2201:2393:2525:2559:2565:2570:2682:2685:2693:2703:2737:2859:2895:2896:2898:2901:2911:2924:2925:2926:2933:2937:2939:2942:2945:2947:2951:2954:3022:3664:3865:3866:3867:3868:3870:3871:3872:3874:3934:3936:3938:3941:3944:3947:3950:3953:3956:3959:4050:4119:4250:4321:4425:4605:5007:6119:6261:7875:7903:8634:9025:10004:11658:13138:13141:13230:13231:14827,0,RBL:217.140.110.172:@arm.com:.lbl8.mailshell.net-64.100.201.201 62.2.0.100,CacheIP:none,Bayesian:0.5,0.5,0.5,Netcheck:none,DomainCache:0,MSF:not bulk,SPF:fp,MSBL:0,DNSBL:neutral,Custom_rules:0:0:0,LFtime:23,LUA_SUMMARY:none X-HE-Tag: bead20_311843bf99f2f X-Filterd-Recvd-Size: 8695 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf37.hostedemail.com (Postfix) with ESMTP for ; Wed, 26 Feb 2020 18:05:37 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2476130E; Wed, 26 Feb 2020 10:05:36 -0800 (PST) Received: from arrakis.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AE0433F881; Wed, 26 Feb 2020 10:05:34 -0800 (PST) From: Catalin Marinas To: linux-arm-kernel@lists.infradead.org Cc: Will Deacon , Vincenzo Frascino , Szabolcs Nagy , Richard Earnshaw , Kevin Brodsky , Andrey Konovalov , Peter Collingbourne , linux-mm@kvack.org, linux-arch@vger.kernel.org Subject: [PATCH v2 00/19] arm64: Memory Tagging Extension user-space support Date: Wed, 26 Feb 2020 18:05:07 +0000 Message-Id: <20200226180526.3272848-1-catalin.marinas@arm.com> X-Mailer: git-send-email 2.25.0 MIME-Version: 1.0 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi, This is the second version (first version here [1]) of the series proposing the user-space support for the ARMv8.5 Memory Tagging Extension ([2], [3]). The patches are also available on this branch: git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux devel/mte-v2 Changes in this version: - HWCAP2_MTE moved to bit 18. - Changed the polarity of the tag exclusion mask passed to prctl() for setting the GCR_EL1.Excl field. It is now an include mask, defaulting to 0 (no tag generated by IRG by default). - Dropped #ifdef __aarch64__ in the generic siginfo.h, renumbered SEGV_MTE* after the SEGV_ADI* macros. - Following an architecture update/fix, accesses to user memory done by the kernel now use the user-selected tag checking mode (SCTLR_EL1.TCF0). This required clearing the PSTATE.TCO on the kernel exception entry and setting the TIF_MTE_ASYNC_FAULT on context switch if any uaccess routine generated an asynchronous tag check fault. - For asynchronous faults in user space, a SIGSEGV is now delivered before processing the syscall (using -ERESTARTNOINTR). - Moved the MTE-related code from arch/arm64/kernel/process.c to mte.c. - Documentation updated following the above ABI changes. - Some of the preparatory or clean-up patches have been merged (as-instr support in Kconfig files, prot flags 0x10 and 0x20 reserved in the generic file, MAIR_EL1 setting cleanup). - Some small fixes and clean-ups following review. While there are still missing bits, I'm posting a v2 to continue the discussion with the libc folk on the main ABI aspects. Additional features will be posted in due course: - ptrace() support to be able to access the tags in memory of a different process, something like PTRACE_{PEEK,POKE}MTETAGS. Under development. - Swap support, currently under development. - Related to the above is suspend to disk. - DT and ACPI description on whether the SoC support MTE (CPUID checking is insufficient). - coredump (user) currently does not contain the tags. - kselftests, under development. - Clarify whether mmap(tagged_addr, PROT_MTE) pre-tags the memory with the tag given in the tagged_addr hint. Following commit ce18d171cb73 ("mm: untag user pointers in mmap/munmap/mremap/brk"), mmap() no longer accepts tagged hint addresses. This could be relaxed only when PROT_MTE is passed, however a deeper investigation is needed on whether we can still keep the zero page on arm64 for mappings that do not require pre-tagging. [1] https://lore.kernel.org/linux-arm-kernel/20191211184027.20130-1-catalin.marinas@arm.com/ [2] https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/enhancing-memory-safety [3] https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/Arm_Memory_Tagging_Extension_Whitepaper.pdf Catalin Marinas (10): arm64: alternative: Allow alternative_insn to always issue the first instruction arm64: mte: Use Normal Tagged attributes for the linear map arm64: mte: Assembler macros and default architecture for .S files arm64: Tags-aware memcmp_pages() implementation arm64: mte: Add PROT_MTE support to mmap() and mprotect() mm: Introduce arch_validate_flags() arm64: mte: Validate the PROT_MTE request via arch_validate_flags() mm: Allow arm64 mmap(PROT_MTE) on RAM-based files arm64: mte: Allow user control of the tag check mode via prctl() arm64: mte: Allow user control of the generated random tags via prctl() Kevin Brodsky (1): mm: Introduce arch_calc_vm_flag_bits() Vincenzo Frascino (8): arm64: mte: system register definitions arm64: mte: CPU feature detection and initial sysreg configuration arm64: mte: Tags-aware clear_page() implementation arm64: mte: Tags-aware copy_page() implementation arm64: mte: Add specific SIGSEGV codes arm64: mte: Handle synchronous and asynchronous tag check faults arm64: mte: Kconfig entry arm64: mte: Add Memory Tagging Extension documentation Documentation/arm64/cpu-feature-registers.rst | 2 + Documentation/arm64/elf_hwcaps.rst | 5 + Documentation/arm64/index.rst | 1 + .../arm64/memory-tagging-extension.rst | 228 ++++++++++++++++++ arch/arm64/Kconfig | 32 +++ arch/arm64/include/asm/alternative.h | 8 +- arch/arm64/include/asm/assembler.h | 17 ++ arch/arm64/include/asm/cpucaps.h | 4 +- arch/arm64/include/asm/cpufeature.h | 6 + arch/arm64/include/asm/hwcap.h | 1 + arch/arm64/include/asm/kvm_arm.h | 3 +- arch/arm64/include/asm/memory.h | 17 +- arch/arm64/include/asm/mman.h | 78 ++++++ arch/arm64/include/asm/mte.h | 35 +++ arch/arm64/include/asm/page.h | 4 +- arch/arm64/include/asm/pgtable-prot.h | 2 + arch/arm64/include/asm/pgtable.h | 7 +- arch/arm64/include/asm/processor.h | 4 + arch/arm64/include/asm/sysreg.h | 62 +++++ arch/arm64/include/asm/thread_info.h | 4 +- arch/arm64/include/uapi/asm/hwcap.h | 2 + arch/arm64/include/uapi/asm/mman.h | 14 ++ arch/arm64/include/uapi/asm/ptrace.h | 1 + arch/arm64/kernel/Makefile | 1 + arch/arm64/kernel/cpufeature.c | 60 +++++ arch/arm64/kernel/cpuinfo.c | 2 + arch/arm64/kernel/entry.S | 27 +++ arch/arm64/kernel/mte.c | 137 +++++++++++ arch/arm64/kernel/process.c | 22 +- arch/arm64/kernel/ptrace.c | 2 +- arch/arm64/kernel/signal.c | 8 + arch/arm64/kernel/syscall.c | 10 + arch/arm64/lib/Makefile | 2 + arch/arm64/lib/clear_page.S | 7 +- arch/arm64/lib/copy_page.S | 23 ++ arch/arm64/lib/mte.S | 46 ++++ arch/arm64/mm/Makefile | 1 + arch/arm64/mm/cmppages.c | 26 ++ arch/arm64/mm/dump.c | 4 + arch/arm64/mm/fault.c | 9 +- arch/arm64/mm/mmu.c | 22 +- arch/arm64/mm/proc.S | 8 +- fs/proc/task_mmu.c | 4 + include/linux/mm.h | 8 + include/linux/mman.h | 22 +- include/uapi/asm-generic/siginfo.h | 4 +- include/uapi/linux/prctl.h | 9 + mm/mmap.c | 9 + mm/mprotect.c | 6 + mm/shmem.c | 3 + mm/util.c | 2 +- 51 files changed, 994 insertions(+), 27 deletions(-) create mode 100644 Documentation/arm64/memory-tagging-extension.rst create mode 100644 arch/arm64/include/asm/mman.h create mode 100644 arch/arm64/include/asm/mte.h create mode 100644 arch/arm64/include/uapi/asm/mman.h create mode 100644 arch/arm64/kernel/mte.c create mode 100644 arch/arm64/lib/mte.S create mode 100644 arch/arm64/mm/cmppages.c