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Fri, 18 Sep 2020 03:19:53 -0700 (PDT) Received: from localhost.localdomain ([2001:1715:4e26:a7e0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id r16sm1940674edc.57.2020.09.18.03.19.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Sep 2020 03:19:53 -0700 (PDT) From: Jean-Philippe Brucker To: iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org Cc: joro@8bytes.org, catalin.marinas@arm.com, will@kernel.org, robin.murphy@arm.com, baolu.lu@linux.intel.com, Jonathan.Cameron@huawei.com, jacob.jun.pan@linux.intel.com, zhangfei.gao@linaro.org, xuzaibo@huawei.com, fenghua.yu@intel.com, eric.auger@redhat.com, Jean-Philippe Brucker Subject: [PATCH v10 00/13] iommu: Shared Virtual Addressing for SMMUv3 (PT sharing part) Date: Fri, 18 Sep 2020 12:18:40 +0200 Message-Id: <20200918101852.582559-1-jean-philippe@linaro.org> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: This is version 10 of the page table sharing support for Arm SMMUv3. Patch 1 still needs an Ack from mm maintainers. However patches 4-11 do not depend on it, and could get merged for v5.10 regardless. v10: * Fix patches 3, 8, 9 and 10 following Eric's review. v9 resend: https://lore.kernel.org/linux-iommu/20200817171558.325917-1-jean-philippe@linaro.org/ * Rebased onto v5.9-rc1. Moved to drivers/iommu/arm/arm-smmu-v3/ as a result. v9: https://lore.kernel.org/linux-iommu/20200723145724.3014766-1-jean-philippe@linaro.org/ * Moved most of the SVA code to arm-smmu-v3-sva.c. This required moving struct definitions and macros to arm-smmu-v3.h (patch 7), hence the new 700 insertions/deletions in the diffstat. * Updated patches 4 and 8 following review. * Fixed a bug when replacing a private ASID. v8: https://lore.kernel.org/linux-iommu/20200618155125.1548969-1-jean-philippe@linaro.org/ * Split SVA series into three parts: page table sharing, I/O page faults, and additional features (DVM, VHE and HTTU). Fenghua Yu (1): mm: Define pasid in mm Jean-Philippe Brucker (12): iommu/ioasid: Add ioasid references iommu/sva: Add PASID helpers arm64: mm: Pin down ASIDs for sharing mm with devices iommu/io-pgtable-arm: Move some definitions to a header arm64: cpufeature: Export symbol read_sanitised_ftr_reg() iommu/arm-smmu-v3: Move definitions to a header iommu/arm-smmu-v3: Share process page tables iommu/arm-smmu-v3: Seize private ASID iommu/arm-smmu-v3: Check for SVA features iommu/arm-smmu-v3: Add SVA device feature iommu/arm-smmu-v3: Implement iommu_sva_bind/unbind() iommu/arm-smmu-v3: Hook up ATC invalidation to mm ops drivers/iommu/Kconfig | 17 + drivers/iommu/Makefile | 1 + drivers/iommu/arm/arm-smmu-v3/Makefile | 5 +- arch/arm64/include/asm/mmu.h | 3 + arch/arm64/include/asm/mmu_context.h | 11 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 752 +++++++++++++++ drivers/iommu/io-pgtable-arm.h | 30 + drivers/iommu/iommu-sva-lib.h | 15 + include/linux/ioasid.h | 10 +- include/linux/mm_types.h | 4 + arch/arm64/kernel/cpufeature.c | 1 + arch/arm64/mm/context.c | 105 ++- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 488 ++++++++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 860 ++++-------------- drivers/iommu/intel/iommu.c | 4 +- drivers/iommu/intel/svm.c | 6 +- drivers/iommu/io-pgtable-arm.c | 27 +- drivers/iommu/ioasid.c | 38 +- drivers/iommu/iommu-sva-lib.c | 86 ++ MAINTAINERS | 3 +- 20 files changed, 1731 insertions(+), 735 deletions(-) create mode 100644 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h create mode 100644 drivers/iommu/io-pgtable-arm.h create mode 100644 drivers/iommu/iommu-sva-lib.h create mode 100644 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c create mode 100644 drivers/iommu/iommu-sva-lib.c Reviewed-by: Jonathan Cameron