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Sat, 28 Oct 2023 16:13:41 -0700 (PDT) Received: from sw06.internal.sifive.com ([4.53.31.132]) by smtp.gmail.com with ESMTPSA id u17-20020a17090341d100b001b8622c1ad2sm3679345ple.130.2023.10.28.16.13.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Oct 2023 16:13:41 -0700 (PDT) From: Samuel Holland To: Palmer Dabbelt , Alexandre Ghiti , linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, Samuel Holland Subject: [PATCH v2 00/11] riscv: ASID-related and UP-related TLB flush enhancements Date: Sat, 28 Oct 2023 16:11:58 -0700 Message-ID: <20231028231339.3116618-1-samuel.holland@sifive.com> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: 1C6C81A0006 X-Stat-Signature: q1mi4we38a19xc3kaiwpu11g7fzhduk3 X-HE-Tag: 1698534822-479369 X-HE-Meta: U2FsdGVkX19koVVpsDLVOb/p7Cz41CVxKTWJZgGfeCaC+togRkHGF4QCv/sODJtwwof9GqmBR2gEIMm/oG2aymIxd2Vl2q8salD21SgWLQkCPl7aqsePMYtx4YkZ29GaOd7PxvlGmm55ay18XW8b2vC1PxhW4lg7pkME3tilKz8CszP+SN1yOYw1EtK5nC2uHzKjSRxSvXGxnFic0p1We66XCvT5tIHCTuEe00NB6YCX0yHzrcR/zUwVIgbhzyv5xr9pBMYPoOeNARM1VY4anE8tJ2LHeUixIkaL9CYk5lybraoWqOj5zsDNAlxZKapV+/mMTeJEClz5KCR7X+UYMCwVUAYtUlgCf1RhGKFvDjhX2CQEfSiLi6GW600Gb8Nmrv0Jbvf/3CtE2vbKjoyrv8nNRPuOyRHXgSnwNgRDKlD+Ceb40PhtSM4OQb2v4YDpNEFLV6wYOoHIdVIAP//k2dxdMcsjGlgQ3rTEn06rD+op8BOJkVcUCuPbOBhv/EbEYdG8eAmFtZvo7OGi73kuXwrAfgNiCBTzMfIZ5tdHwu3jTo5bZrWuMv7GTkOqvVfsLhBaGmF3jmxDi6BLUNskS8Y4Q99dJLYGF0QRAJ9583At/QlFXrpyH0AI9BzBNKK5dDwrHe5iknNr4RuKBUkf5booeDuTlYxntjtI1qKGTZ5MN5KjcF6VzKwMlpH0G0hAD1h59qjzcTVmCOq9idB5CI16w+cczMcEMinKac2Pey0cTH5CcHqw60sG2uOqT4Aen6fTPrQYebN7Eplavp3Nzvvs0FHf+JAsKRfXS0qhSs55YCJUpR3BM0draCBcYBxMPJ77Vn0gnhC4UeCiJ540umHMdFgqOn7xJX9gpEu4FtWO5bZ7ZWqwgO8+F8l5kZ25+YrEZtjq21N3nY/U90fOb70Mx1tPXYLYopcwuI9hvIhJE6djPB2L3YCF6QTqI8PXRvPgRVTpJQaKAU7eXJd aER7JajE M2giUoDCrMf8FJfbBLW0SlBC7YwPsbmKpTdcnSbYleeeOxenUr0sXi7p1n9IYdY26RUHZecTqevA15zvcDyHbsUrc/DN2WPkbRt3YfA5ZonLDu6YnYOyFfp5gfHM2M86dEyqKetbSwZDmbT7ZJd1LEVa+YEtb8Wcjpq14gqoDFEiIiOkpCaK2qz241FHFPtwycmRVWgKarGuWQdAzLG9+VXyiEje4MFJSOKMEd7hecQg2LfNlJiGFGv2lylgHAhL9PiuC+GwAGqGTZRoJdjPMGyKmCCwEuqtRw+lY08OJb+dxoAHkED3RN/MfR7Sjp4LYoWlWfJ8JHLq3N1Rms99Az26uF7tjz9PAT61bFkQb1d/qfRQ2r1v7dYTN3DqjuF8YrmEakZYInQ+VLgYzZrcf7q9XKuN5AqTMgR/HGsqkrb4nNWNViGdnWSldz1lHpk6XQCmqeP21aq5wMgc= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: While reviewing Alexandre Ghiti's "riscv: tlb flush improvements" series[1], I noticed that most TLB flush functions end up as a call to local_flush_tlb_all() when SMP is disabled. This series resolves that. Along the way, I realized that we should be using single-ASID flushes wherever possible, so I implemented that as well. [1]: https://lore.kernel.org/linux-riscv/20231019140151.21629-1-alexghiti@rivosinc.com/ --- This series is based on v5 of Alexandre's changes, which I have included here so the series can be built by the CI bots. I will rebase once his series is merged. Changes in v2: - Rebase on Alexandre's "riscv: tlb flush improvements" series v5 - Move the SMP/UP merge earlier in the series to avoid build issues - Make a copy of __flush_tlb_range() instead of adding ifdefs inside - local_flush_tlb_all() is the only function used on !MMU (smpboot.c) Alexandre Ghiti (4): riscv: Improve tlb_flush() riscv: Improve flush_tlb_range() for hugetlb pages riscv: Make __flush_tlb_range() loop over pte instead of flushing the whole tlb riscv: Improve flush_tlb_kernel_range() Samuel Holland (7): riscv: mm: Combine the SMP and UP TLB flush code riscv: Apply SiFive CIP-1200 workaround to single-ASID sfence.vma riscv: mm: Introduce cntx2asid/cntx2version helper macros riscv: mm: Use a fixed layout for the MM context ID riscv: mm: Make asid_bits a local variable riscv: mm: Preserve global TLB entries when switching contexts riscv: mm: Always use ASID to flush MM contexts arch/riscv/include/asm/errata_list.h | 12 +- arch/riscv/include/asm/mmu.h | 3 + arch/riscv/include/asm/mmu_context.h | 2 - arch/riscv/include/asm/sbi.h | 3 - arch/riscv/include/asm/tlb.h | 8 +- arch/riscv/include/asm/tlbflush.h | 59 +++++---- arch/riscv/kernel/sbi.c | 32 ++--- arch/riscv/mm/Makefile | 5 +- arch/riscv/mm/context.c | 26 ++-- arch/riscv/mm/tlbflush.c | 184 ++++++++++++++++----------- 10 files changed, 186 insertions(+), 148 deletions(-)