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[217.140.101.70]) by mx.google.com with ESMTP id 12si2621876edx.436.2019.02.13.00.06.49 for ; Wed, 13 Feb 2019 00:06:49 -0800 (PST) Received-SPF: pass (google.com: domain of anshuman.khandual@arm.com designates 217.140.101.70 as permitted sender) client-ip=217.140.101.70; Authentication-Results: mx.google.com; spf=pass (google.com: domain of anshuman.khandual@arm.com designates 217.140.101.70 as permitted sender) smtp.mailfrom=anshuman.khandual@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E152A1596; Wed, 13 Feb 2019 00:06:48 -0800 (PST) Received: from p8cg001049571a15.blr.arm.com (p8cg001049571a15.blr.arm.com [10.162.43.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 146E13F575; Wed, 13 Feb 2019 00:06:45 -0800 (PST) From: Anshuman Khandual To: linux-mm@kvack.org, akpm@linux-foundation.org Cc: mhocko@kernel.org, kirill@shutemov.name, kirill.shutemov@linux.intel.com, vbabka@suse.cz, will.deacon@arm.com, catalin.marinas@arm.com, dave.hansen@intel.com Subject: [RFC 3/4] arm64/mm: Allow non-exec to exec transition in ptep_set_access_flags() Date: Wed, 13 Feb 2019 13:36:30 +0530 Message-Id: <1550045191-27483-4-git-send-email-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1550045191-27483-1-git-send-email-anshuman.khandual@arm.com> References: <1550045191-27483-1-git-send-email-anshuman.khandual@arm.com> X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: X-Virus-Scanned: ClamAV using ClamSMTP ptep_set_access_flags() updates page table for a mapped page entry which still got a fault probably because of a different permission than what it is mapped with. Previously an exec enabled page always gets required permission in the page table entry. Hence ptep_set_access_flags() never had to move an entry from non-exec to exec. This is going to change with deferred exec permission setting with later patches. Hence allow non-exec to exec transition here and do the required I-cache invalidation. Signed-off-by: Anshuman Khandual --- arch/arm64/mm/fault.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index 591670d..1540fc1 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -227,22 +227,25 @@ int ptep_set_access_flags(struct vm_area_struct *vma, if (pte_same(pte, entry)) return 0; - /* only preserve the access flags and write permission */ - pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY; + /* only preserve the access flags, write and exec permission */ + pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY | PTE_UXN; + + if (pte_user_exec(entry)) + __sync_icache_dcache(pte); /* * Setting the flags must be done atomically to avoid racing with the - * hardware update of the access/dirty state. The PTE_RDONLY bit must - * be set to the most permissive (lowest value) of *ptep and entry - * (calculated as: a & b == ~(~a | ~b)). + * hardware update of the access/dirty state. The PTE_RDONLY bit and + * PTE_UXN must be set to the most permissive (lowest value) of *ptep + * and entry (calculated as: a & b == ~(~a | ~b)). */ - pte_val(entry) ^= PTE_RDONLY; + pte_val(entry) ^= PTE_RDONLY | PTE_UXN; pteval = pte_val(pte); do { old_pteval = pteval; - pteval ^= PTE_RDONLY; + pteval ^= PTE_RDONLY | PTE_UXN; pteval |= pte_val(entry); - pteval ^= PTE_RDONLY; + pteval ^= PTE_RDONLY | PTE_UXN; pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval); } while (pteval != old_pteval);