| Message ID | 167564539875.847146.16213498614174558767.stgit@dwillia2-xfh.jf.intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | CXL RAM and the 'Soft Reserved' => 'System RAM' default | expand |
On Sun, Feb 05, 2023 at 05:03:18PM -0800, Dan Williams wrote: > Add help text and a label so the CXL_REGION config option can be > toggled. This is mainly to enable compile testing without region > support. > > Signed-off-by: Dan Williams <dan.j.williams@intel.com> > --- > drivers/cxl/Kconfig | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > Reviewed-by: Gregory Price <gregory.price@memverge.com
On 2/5/23 6:03 PM, Dan Williams wrote: > Add help text and a label so the CXL_REGION config option can be > toggled. This is mainly to enable compile testing without region > support. > > Signed-off-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> > --- > drivers/cxl/Kconfig | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig > index 0ac53c422c31..163c094e67ae 100644 > --- a/drivers/cxl/Kconfig > +++ b/drivers/cxl/Kconfig > @@ -104,12 +104,22 @@ config CXL_SUSPEND > depends on SUSPEND && CXL_MEM > > config CXL_REGION > - bool > + bool "CXL: Region Support" > default CXL_BUS > # For MAX_PHYSMEM_BITS > depends on SPARSEMEM > select MEMREGION > select GET_FREE_REGION > + help > + Enable the CXL core to enumerate and provision CXL regions. A CXL > + region is defined by one or more CXL expanders that decode a given > + system-physical address range. For CXL regions established by > + platform-firmware this option enables memory error handling to > + identify the devices participating in a given interleaved memory > + range. Otherwise, platform-firmware managed CXL is enabled by being > + placed in the system address map and does not need a driver. > + > + If unsure say 'y' > > config CXL_REGION_INVALIDATION_TEST > bool "CXL: Region Cache Management Bypass (TEST)" >
On Sun, 05 Feb 2023 17:03:18 -0800 Dan Williams <dan.j.williams@intel.com> wrote: > Add help text and a label so the CXL_REGION config option can be > toggled. This is mainly to enable compile testing without region > support. Hmm. Possibly pull the reasoning up here for why this might want to be configurable at all. I'm not sure I fully follow your reasoning as enumerating existing regions 'should' be harmless gathering of information, not something that could do any damage - so who would turn this off? Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > > Signed-off-by: Dan Williams <dan.j.williams@intel.com> > --- > drivers/cxl/Kconfig | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig > index 0ac53c422c31..163c094e67ae 100644 > --- a/drivers/cxl/Kconfig > +++ b/drivers/cxl/Kconfig > @@ -104,12 +104,22 @@ config CXL_SUSPEND > depends on SUSPEND && CXL_MEM > > config CXL_REGION > - bool > + bool "CXL: Region Support" > default CXL_BUS > # For MAX_PHYSMEM_BITS > depends on SPARSEMEM > select MEMREGION > select GET_FREE_REGION > + help > + Enable the CXL core to enumerate and provision CXL regions. A CXL > + region is defined by one or more CXL expanders that decode a given > + system-physical address range. For CXL regions established by > + platform-firmware this option enables memory error handling to > + identify the devices participating in a given interleaved memory > + range. Otherwise, platform-firmware managed CXL is enabled by being > + placed in the system address map and does not need a driver. > + > + If unsure say 'y' > > config CXL_REGION_INVALIDATION_TEST > bool "CXL: Region Cache Management Bypass (TEST)" > >
On Sun, 2023-02-05 at 17:03 -0800, Dan Williams wrote: > Add help text and a label so the CXL_REGION config option can be > toggled. This is mainly to enable compile testing without region > support. > > Signed-off-by: Dan Williams <dan.j.williams@intel.com> > --- > drivers/cxl/Kconfig | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig > index 0ac53c422c31..163c094e67ae 100644 > --- a/drivers/cxl/Kconfig > +++ b/drivers/cxl/Kconfig > @@ -104,12 +104,22 @@ config CXL_SUSPEND > depends on SUSPEND && CXL_MEM > > config CXL_REGION > - bool > + bool "CXL: Region Support" > default CXL_BUS > # For MAX_PHYSMEM_BITS > depends on SPARSEMEM > select MEMREGION > select GET_FREE_REGION > + help > + Enable the CXL core to enumerate and provision CXL regions. A CXL > + region is defined by one or more CXL expanders that decode a given > + system-physical address range. For CXL regions established by > + platform-firmware this option enables memory error handling to unnecessary-hyphenation? But regardless, Reviewed-by: Vishal Verma <vishal.l.verma@intel.com> > + identify the devices participating in a given interleaved memory > + range. Otherwise, platform-firmware managed CXL is enabled by being > + placed in the system address map and does not need a driver. > + > + If unsure say 'y' > > config CXL_REGION_INVALIDATION_TEST > bool "CXL: Region Cache Management Bypass (TEST)" > >
diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig index 0ac53c422c31..163c094e67ae 100644 --- a/drivers/cxl/Kconfig +++ b/drivers/cxl/Kconfig @@ -104,12 +104,22 @@ config CXL_SUSPEND depends on SUSPEND && CXL_MEM config CXL_REGION - bool + bool "CXL: Region Support" default CXL_BUS # For MAX_PHYSMEM_BITS depends on SPARSEMEM select MEMREGION select GET_FREE_REGION + help + Enable the CXL core to enumerate and provision CXL regions. A CXL + region is defined by one or more CXL expanders that decode a given + system-physical address range. For CXL regions established by + platform-firmware this option enables memory error handling to + identify the devices participating in a given interleaved memory + range. Otherwise, platform-firmware managed CXL is enabled by being + placed in the system address map and does not need a driver. + + If unsure say 'y' config CXL_REGION_INVALIDATION_TEST bool "CXL: Region Cache Management Bypass (TEST)"
Add help text and a label so the CXL_REGION config option can be toggled. This is mainly to enable compile testing without region support. Signed-off-by: Dan Williams <dan.j.williams@intel.com> --- drivers/cxl/Kconfig | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)