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bh=1wW75nbCrf3Mo9olc/rXs6RitxwA0HhPGRVwUk3MkpQ=; b=MAv+KLKhgRC94QyOseM45DcqExeIqgt1/jGSmn7oU4HqPixgkYVg6cJO 9mINmwY/1ASf6UYfhsZgbSMC8yaRSS2yFibBrphmvMFYT9KOmzO36ilyn Hp5GQFa7sgQkgHueZvEWYQDlk2L9M1SzHClbJggVbZ1kddZU0IFpJyNdy ZKNjJjJp4/rHiSwuV5kgnWy2FQIksxbAa1MNIhujYAyzQX2IYKOFt/kLO h6CXzBePnnHtPlPLrBZGytpWtZLEMIiSnfFgGTbj6zk7VVIFN9QRax7Ee y91d2glGMo5hUY3LW3x6aG/KQcr4FdlbCH5XX/b5lO1mPoAPBZyu94Oie g==; X-IronPort-AV: E=McAfee;i="6500,9779,10612"; a="312763210" X-IronPort-AV: E=Sophos;i="5.97,276,1669104000"; d="scan'208";a="312763210" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2023 17:03:19 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10612"; a="616291323" X-IronPort-AV: E=Sophos;i="5.97,276,1669104000"; d="scan'208";a="616291323" Received: from mkrysak-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.255.187]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2023 17:03:19 -0800 Subject: [PATCH 09/18] cxl/region: Enable CONFIG_CXL_REGION to be toggled From: Dan Williams To: linux-cxl@vger.kernel.org Cc: dave.hansen@linux.intel.com, linux-mm@kvack.org, linux-acpi@vger.kernel.org Date: Sun, 05 Feb 2023 17:03:18 -0800 Message-ID: <167564539875.847146.16213498614174558767.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167564534874.847146.5222419648551436750.stgit@dwillia2-xfh.jf.intel.com> References: <167564534874.847146.5222419648551436750.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 X-Rspamd-Queue-Id: A3F8C80004 X-Rspamd-Server: rspam09 X-Rspam-User: X-Stat-Signature: ffjx4f415n77n53hz1si5otmsxadqob3 X-HE-Tag: 1675645405-807700 X-HE-Meta: U2FsdGVkX18On5iVF2MmyZ0b2QrZEmQ4P9W4ZStrrRDz6liomkKuFp8n9qz0pUBvzPtdQV9oxIrOKxhd0ecjz/m4KlJh+A2vrPB8EVJSjNoT51qCs6mCjZvhx3J2dVVHKrxnDQlLsCketHbFHDQ1IpDSjM4ozYkscfXt4ffIII4z0Mvv/apsqemE4qvBXi34VOJ5R2k2SmGzNmySz4ToTA7gF38AugjZv7BFxxA5+A3OD354ZsEXDeGvIy34DKBMLVIK7OCI6L6OKi0XV472WpKY9okz0rS0VU/5oB7MZY2TTiuOggrXa3vuNoGtcz66GbfYX9+ux6hrtixGKvMFtAra83xYUZ1IgNg6W3u/XgR8gMB+ipreV6NQs9XkLOwkhnRgcU97SRCPjrAxp6TAkrpc0he9S0f/gK1Br30hzoBCEbVo2Oga0bOD2w+cHHWnqF3ABg/gG0LUAD0VRCL966lr8TS+3zCBsM04L3Gxh6nc+kn2S6m6EInmaPih078XNMHCQn0xw8qy3jF06YAAF4FAtseDuHgpYBv9KK2alK8uYTH7J5i47rlZaMFoeLZtZSBIolPKNIXNfV0AJ5z7iO3U6sfv8juXkK9ops8ZTrEqclY6kVmO6ZHM+rdPERPZGF4MAXNL4WzciUFTpbFUlV49K/sFkIfStGKG6Sge9PtBKzw3NR3ghi2aZ+YnG2lwpv4tgcdizoE/sUuD1aFco7xbwLEZtrHvIMXKV8/gmJGp6yUPk3LX80YQlPozh5oytJVuSy8RM4J6EljIcuiQ9K6dDdFutM78/TvKcqxoD1bJUXJbW1SBHaLF0eBOreqJxMv3B+JsP7g6uV4j/kQUnSpp8ROqg0TPtc7lWA16DeNVEMcLdAihuSyaU74OMXj6d4O8/HZjktMRkLuZ7MUdFPdvYUTWh2CaPW6CjDafE+OaRnsgAG0O61QcbTagDDoJA2Wf1GTqvqtml8v33dU veK4NNe/ 4AYFlZSlilV6HISKfwhAbzq2iEe30aVjX3vg6HXXXb733RFsFHn7W1gOiAzi+mQtbARV4NjD3W9SdfqYqhQo281xxtEDdcUIXjK91dwWq88uHhCgy3a01GUpm+y/UtZ8FHEHyprSDfqBZsTiL1HZ+VOzJfHLN4a5yFifb3EosSUkMmbk36R8ETMBl1OB+JTPJ7UKfdtrpH6INNaCfD/kXXqjXPV89f0nAqpPXkZUNLL2wDTo= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000001, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Add help text and a label so the CXL_REGION config option can be toggled. This is mainly to enable compile testing without region support. Signed-off-by: Dan Williams Reviewed-by: Gregory Price Reviewed-by: Jonathan Cameron Reviewed-by: Vishal Verma --- drivers/cxl/Kconfig | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig index 0ac53c422c31..163c094e67ae 100644 --- a/drivers/cxl/Kconfig +++ b/drivers/cxl/Kconfig @@ -104,12 +104,22 @@ config CXL_SUSPEND depends on SUSPEND && CXL_MEM config CXL_REGION - bool + bool "CXL: Region Support" default CXL_BUS # For MAX_PHYSMEM_BITS depends on SPARSEMEM select MEMREGION select GET_FREE_REGION + help + Enable the CXL core to enumerate and provision CXL regions. A CXL + region is defined by one or more CXL expanders that decode a given + system-physical address range. For CXL regions established by + platform-firmware this option enables memory error handling to + identify the devices participating in a given interleaved memory + range. Otherwise, platform-firmware managed CXL is enabled by being + placed in the system address map and does not need a driver. + + If unsure say 'y' config CXL_REGION_INVALIDATION_TEST bool "CXL: Region Cache Management Bypass (TEST)"