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[217.140.101.70]) by mx.google.com with ESMTP id w5-v6si658174oth.377.2018.06.26.10.02.55 for ; Tue, 26 Jun 2018 10:02:55 -0700 (PDT) Received-SPF: pass (google.com: domain of james.morse@arm.com designates 217.140.101.70 as permitted sender) client-ip=217.140.101.70; Authentication-Results: mx.google.com; spf=pass (google.com: domain of james.morse@arm.com designates 217.140.101.70 as permitted sender) smtp.mailfrom=james.morse@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4D8981AED; Tue, 26 Jun 2018 10:02:55 -0700 (PDT) Received: from melchizedek.cambridge.arm.com (melchizedek.cambridge.arm.com [10.1.206.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 319453F318; Tue, 26 Jun 2018 10:02:52 -0700 (PDT) From: James Morse To: linux-acpi@vger.kernel.org Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, Borislav Petkov , Marc Zyngier , Christoffer Dall , Will Deacon , Catalin Marinas , Naoya Horiguchi , Rafael Wysocki , Len Brown , Tony Luck , Tyler Baicar , Dongjiu Geng , Xie XiuQi , Punit Agrawal , jonathan.zhang@cavium.com, James Morse Subject: [PATCH v5 16/20] ACPI / APEI: Split fixmap pages for arm64 NMI-like notifications Date: Tue, 26 Jun 2018 18:01:12 +0100 Message-Id: <20180626170116.25825-17-james.morse@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180626170116.25825-1-james.morse@arm.com> References: <20180626170116.25825-1-james.morse@arm.com> X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: X-Virus-Scanned: ClamAV using ClamSMTP Now that ghes notification helpers provide the fixmap slots and take the lock themselves we can support multiple NMI-like notifications on arm64. These should be named after their notification method. x86's NOTIFY_NMI already is, move it to live with the ghes_nmi list. Change the SEA fixmap entry to be called FIX_APEI_GHES_SEA. Future patches can add support for FIX_APEI_GHES_SEI and FIX_APEI_GHES_SDEI_{NORMAL,CRITICAL}. Signed-off-by: James Morse --- Changes since v3: * idx/lock are now in a separate struct. * Add to the comment above ghes_fixmap_lock_irq so that it makes more sense in isolation. --- arch/arm64/include/asm/fixmap.h | 4 +++- drivers/acpi/apei/ghes.c | 6 +++--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/fixmap.h b/arch/arm64/include/asm/fixmap.h index ec1e6d6fa14c..c3974517c2cb 100644 --- a/arch/arm64/include/asm/fixmap.h +++ b/arch/arm64/include/asm/fixmap.h @@ -55,7 +55,9 @@ enum fixed_addresses { #ifdef CONFIG_ACPI_APEI_GHES /* Used for GHES mapping from assorted contexts */ FIX_APEI_GHES_IRQ, - FIX_APEI_GHES_NMI, +#ifdef CONFIG_ACPI_APEI_SEA + FIX_APEI_GHES_SEA, +#endif #endif /* CONFIG_ACPI_APEI_GHES */ #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index f196f8797fc1..15d472048aa8 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -982,7 +982,7 @@ int ghes_notify_sea(void) int rv; raw_spin_lock(&ghes_notify_lock_sea); - rv = ghes_estatus_queue_notified(&ghes_sea, FIX_APEI_GHES_NMI); + rv = ghes_estatus_queue_notified(&ghes_sea, FIX_APEI_GHES_SEA); raw_spin_unlock(&ghes_notify_lock_sea); return rv; @@ -1013,8 +1013,8 @@ static inline void ghes_sea_remove(struct ghes *ghes) { } #ifdef CONFIG_HAVE_ACPI_APEI_NMI /* - * NMI may be triggered on any CPU, so ghes_in_nmi is used for - * having only one concurrent reader. + * NOTIFY_NMI may be triggered on any CPU, so ghes_in_nmi is + * used for having only one concurrent reader. */ static atomic_t ghes_in_nmi = ATOMIC_INIT(0);