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Shutemov" , Andi Kleen , tony.luck@intel.com, marcorr@google.com, sathyanarayanan.kuppuswamy@linux.intel.com, Brijesh Singh Subject: [PATCH Part2 v5 02/45] iommu/amd: Introduce function to check SEV-SNP support Date: Fri, 20 Aug 2021 10:58:35 -0500 Message-Id: <20210820155918.7518-3-brijesh.singh@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210820155918.7518-1-brijesh.singh@amd.com> References: <20210820155918.7518-1-brijesh.singh@amd.com> X-ClientProxiedBy: SN7P222CA0013.NAMP222.PROD.OUTLOOK.COM (2603:10b6:806:124::11) To SN6PR12MB2718.namprd12.prod.outlook.com (2603:10b6:805:6f::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from sbrijesh-desktop.amd.com (165.204.77.1) by SN7P222CA0013.NAMP222.PROD.OUTLOOK.COM (2603:10b6:806:124::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4436.18 via Frontend Transport; Fri, 20 Aug 2021 15:59:55 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 640aa177-0f1d-46be-f1bf-08d963f38de8 X-MS-TrafficTypeDiagnostic: SA0PR12MB4384: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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dkim=pass header.d=amd.com header.s=selector1 header.b=iO3DBuWp; dmarc=pass (policy=quarantine) header.from=amd.com; spf=pass (imf01.hostedemail.com: domain of brijesh.singh@amd.com designates 40.107.100.58 as permitted sender) smtp.mailfrom=brijesh.singh@amd.com X-Stat-Signature: 8h6x49t6i875so4yapgbdmrr3zbkhcoo X-Rspamd-Queue-Id: 5174D505CA52 X-Rspamd-Server: rspam05 X-HE-Tag: 1629475200-566865 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: The SEV-SNP support requires that IOMMU must to enabled, see the IOMMU spec section 2.12 for further details. If IOMMU is not enabled or the SNPSup extended feature register is not set then the SNP_INIT command (used for initializing firmware) will fail. The iommu_sev_snp_supported() can be used to check if IOMMU supports the SEV-SNP feature. Signed-off-by: Brijesh Singh --- drivers/iommu/amd/init.c | 30 ++++++++++++++++++++++++++++++ include/linux/iommu.h | 9 +++++++++ 2 files changed, 39 insertions(+) diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c index 46280e6e1535..bd420fb71126 100644 --- a/drivers/iommu/amd/init.c +++ b/drivers/iommu/amd/init.c @@ -3320,3 +3320,33 @@ int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 return iommu_pc_get_set_reg(iommu, bank, cntr, fxn, value, true); } + +bool iommu_sev_snp_supported(void) +{ + struct amd_iommu *iommu; + + /* + * The SEV-SNP support requires that IOMMU must be enabled, and is + * not configured in the passthrough mode. + */ + if (no_iommu || iommu_default_passthrough()) { + pr_err("SEV-SNP: IOMMU is either disabled or configured in passthrough mode.\n"); + return false; + } + + /* + * Iterate through all the IOMMUs and verify the SNPSup feature is + * enabled. + */ + for_each_iommu(iommu) { + if (!iommu_feature(iommu, FEATURE_SNP)) { + pr_err("SNPSup is disabled (devid: %02x:%02x.%x)\n", + PCI_BUS_NUM(iommu->devid), PCI_SLOT(iommu->devid), + PCI_FUNC(iommu->devid)); + return false; + } + } + + return true; +} +EXPORT_SYMBOL_GPL(iommu_sev_snp_supported); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 32d448050bf7..269abc17b2c3 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -604,6 +604,12 @@ struct iommu_sva *iommu_sva_bind_device(struct device *dev, void iommu_sva_unbind_device(struct iommu_sva *handle); u32 iommu_sva_get_pasid(struct iommu_sva *handle); +#ifdef CONFIG_AMD_MEM_ENCRYPT +bool iommu_sev_snp_supported(void); +#else +static inline bool iommu_sev_snp_supported(void) { return false; } +#endif + #else /* CONFIG_IOMMU_API */ struct iommu_ops {}; @@ -999,6 +1005,9 @@ static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev) { return NULL; } + +static inline bool iommu_sev_snp_supported(void) { return false; } + #endif /* CONFIG_IOMMU_API */ /**