Message ID | 20220224165625.2175020-14-brijesh.singh@amd.com (mailing list archive) |
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State | New |
Headers | show
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Thu, 24 Feb 2022 10:58:14 -0600 From: Brijesh Singh <brijesh.singh@amd.com> To: <x86@kernel.org>, <linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>, <linux-efi@vger.kernel.org>, <platform-driver-x86@vger.kernel.org>, <linux-coco@lists.linux.dev>, <linux-mm@kvack.org> CC: Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, Joerg Roedel <jroedel@suse.de>, Tom Lendacky <thomas.lendacky@amd.com>, "H. Peter Anvin" <hpa@zytor.com>, Ard Biesheuvel <ardb@kernel.org>, Paolo Bonzini <pbonzini@redhat.com>, Sean Christopherson <seanjc@google.com>, "Vitaly Kuznetsov" <vkuznets@redhat.com>, Jim Mattson <jmattson@google.com>, "Andy Lutomirski" <luto@kernel.org>, Dave Hansen <dave.hansen@linux.intel.com>, Sergio Lopez <slp@redhat.com>, Peter Gonda <pgonda@google.com>, "Peter Zijlstra" <peterz@infradead.org>, Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>, David Rientjes <rientjes@google.com>, Dov Murik <dovmurik@linux.ibm.com>, Tobin Feldman-Fitzthum <tobin@ibm.com>, Borislav Petkov <bp@alien8.de>, Michael Roth <michael.roth@amd.com>, Vlastimil Babka <vbabka@suse.cz>, "Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>, Andi Kleen <ak@linux.intel.com>, "Dr . David Alan Gilbert" <dgilbert@redhat.com>, <brijesh.ksingh@gmail.com>, <tony.luck@intel.com>, <marcorr@google.com>, <sathyanarayanan.kuppuswamy@linux.intel.com>, Brijesh Singh <brijesh.singh@amd.com>, Venu Busireddy <venu.busireddy@oracle.com> Subject: [PATCH v11 13/45] x86/sev: Add a helper for the PVALIDATE instruction Date: Thu, 24 Feb 2022 10:55:53 -0600 Message-ID: <20220224165625.2175020-14-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220224165625.2175020-1-brijesh.singh@amd.com> References: <20220224165625.2175020-1-brijesh.singh@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 19ea9ab0-af96-4298-3aa6-08d9f7b6df2e X-MS-TrafficTypeDiagnostic: DM6PR12MB3803:EE_ X-Microsoft-Antispam-PRVS: <DM6PR12MB3803A4BD1B73B457A243680EE53D9@DM6PR12MB3803.namprd12.prod.outlook.com> X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: GCvmEelXzUlxpkZtkLnXzrUCijIzO2NxblrwEXY2xSXyQZqRGKBX+7FleE6Jc0Wci9wc18yROaUIbm6uBtfIx60JqBiqvw4Sk1lqWTI+78/FzMwlbFThLKdgMilBxSOQVujUGZYBn+MGWj7xrblTO0EkZLUqy/B77QWkip7AT3R4bzDWN9dCo1Z6UKPJv1l3lG6RajY4sAOMNvBfPOWxQ1sjUozkEGf9X20CJ2ac/0NSoqCA0S3Ig40kMjkHsWmxsF1fTFkc+le2HYsu5M1LaManc/Mv66QYKCuHO2GBSt/EOeZ5kveL9iqct4LlA57UeKnAC/j5zyNv1qltb3l7XKEEmsM8IlZTWuIx14+brXEePFvIqdozfcoO6KRTHfFD8JhmnkncZXB27jMbJO0uY/iBDaZRMI06brwPW+iG3GZvrOS49UcIYUzIw7eBonyplxigEwPjmyT/0+n7er5u7tWJtyd93L3vVza4D0n/dMIyfCQW+/im/7IMNbXc6GVfcwJQ8yi4nOsNxKO+co1Zv7HNGkJHX5mjTNwj9fPqLouICGiNVfab/e8X0fwco+thLZWwyuXk6XiWqAFxdps9KVfrgUeZuGXav2jhz5oCe8WjEeS5YZBhFYY/4Ao1Z/s1uf9awaqrI4m6fg1uUCHr/h1kVT0aK58DDTgs7OoLiCSp4eW0Gx2n9guhpFgq6HUi9lb3ohlBelAhW4w6bOMD7DaMuACOLfiKC50UbB2Nck0= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(46966006)(40470700004)(36840700001)(6666004)(8936002)(356005)(82310400004)(7696005)(110136005)(316002)(54906003)(40460700003)(2906002)(5660300002)(26005)(186003)(16526019)(336012)(426003)(47076005)(508600001)(1076003)(36860700001)(7416002)(7406005)(36756003)(70586007)(70206006)(81166007)(4326008)(2616005)(8676002)(44832011)(86362001)(83380400001)(2101003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2022 16:58:24.8999 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 19ea9ab0-af96-4298-3aa6-08d9f7b6df2e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT046.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3803 X-Rspamd-Queue-Id: CB5AE1A0017 X-Stat-Signature: 69o8nfwd8jg1efoaxifoodz6i3djpxwd Authentication-Results: imf19.hostedemail.com; dkim=pass header.d=amd.com header.s=selector1 header.b=YYesPDLt; dmarc=pass (policy=quarantine) header.from=amd.com; spf=pass (imf19.hostedemail.com: domain of brijesh.singh@amd.com designates 40.107.96.82 as permitted sender) smtp.mailfrom=brijesh.singh@amd.com X-Rspam-User: X-Rspamd-Server: rspam11 X-HE-Tag: 1645721908-795032 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: <linux-mm.kvack.org> |
Series |
Add AMD Secure Nested Paging (SEV-SNP) Guest Support
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expand
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diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h index 17b75f6ee11a..4ee98976aed8 100644 --- a/arch/x86/include/asm/sev.h +++ b/arch/x86/include/asm/sev.h @@ -60,6 +60,9 @@ extern void vc_no_ghcb(void); extern void vc_boot_ghcb(void); extern bool handle_vc_boot_ghcb(struct pt_regs *regs); +/* Software defined (when rFlags.CF = 1) */ +#define PVALIDATE_FAIL_NOUPDATE 255 + #ifdef CONFIG_AMD_MEM_ENCRYPT extern struct static_key_false sev_es_enable_key; extern void __sev_es_ist_enter(struct pt_regs *regs); @@ -87,12 +90,30 @@ extern enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb, struct es_em_ctxt *ctxt, u64 exit_code, u64 exit_info_1, u64 exit_info_2); +static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) +{ + bool no_rmpupdate; + int rc; + + /* "pvalidate" mnemonic support in binutils 2.36 and newer */ + asm volatile(".byte 0xF2, 0x0F, 0x01, 0xFF\n\t" + CC_SET(c) + : CC_OUT(c) (no_rmpupdate), "=a"(rc) + : "a"(vaddr), "c"(rmp_psize), "d"(validate) + : "memory", "cc"); + + if (no_rmpupdate) + return PVALIDATE_FAIL_NOUPDATE; + + return rc; +} #else static inline void sev_es_ist_enter(struct pt_regs *regs) { } static inline void sev_es_ist_exit(void) { } static inline int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) { return 0; } static inline void sev_es_nmi_complete(void) { } static inline int sev_es_efi_map_ghcbs(pgd_t *pgd) { return 0; } +static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) { return 0; } #endif #endif