From patchwork Thu Feb 24 16:56:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brijesh Singh X-Patchwork-Id: 12758972 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5AF94C4167E for ; Thu, 24 Feb 2022 16:59:06 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id CD75D8D001F; Thu, 24 Feb 2022 11:58:58 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id CADF38D0018; Thu, 24 Feb 2022 11:58:58 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id B77D38D001F; Thu, 24 Feb 2022 11:58:58 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (relay.hostedemail.com [64.99.140.26]) by kanga.kvack.org (Postfix) with ESMTP id A4EA48D0018 for ; Thu, 24 Feb 2022 11:58:58 -0500 (EST) Received: from smtpin02.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay06.hostedemail.com (Postfix) with ESMTP id 89228236E7 for ; Thu, 24 Feb 2022 16:58:58 +0000 (UTC) X-FDA: 79178283156.02.D9AF619 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2081.outbound.protection.outlook.com [40.107.244.81]) by imf22.hostedemail.com (Postfix) with ESMTP id B29D6C000B for ; Thu, 24 Feb 2022 16:58:57 +0000 (UTC) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=C8OO7PSZOCKq8cc3/mji+5QtLjv75yVgH0MQoN3NwbGcXPD8hTCD0+MqqZOUyQ9MXy1K1WiuofMxg0E8sTCa1G4ZMyp8uKAClGoX8xhdg6QGrXbBeS2wWG7A3qWxFXkkYLzklZUAG7MhYVtNxxw+NwqN+pYOWCkz/zVIiEzN7tAqxaJxMBhMuMUwtkAfku+DlBJIyqS6mKsVh7jGr1knhKgjMC56fh35aCs1lDP+JTYUHOCIpFKi/zGiPbFVKq8/KjoL1rpj8cyyfyzOwpiz2+TGVixED9YY9wDKysMGEFMHSxUw+rDnmvNqXc0w48xZ7nJW6godcXFpAF6ckl1A1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=IdrKphhrf27VGh6aqz9uuWMACK5r7ZHw+UjZyBoEbh4=; b=cTynGTXmE/FT4EhDlLsBiLjUgpuT61VFw+2hXspnuKNFHNW1JhIv5oTMjrznoORcI6gKsXAqR+ktQiLgiJtsYlCTDbc1L0ND8dD698zY6LXOa69GYyMza8qAgNvZgg1kElBgqIHXRhMLT4xWDOE+8wA51ZuPKSZJyA5rnCNwLrxMwhjtuQLgN+TSoJ5LzBx/adTuFMlIBFjgg/f0c0My5E4i+miW/dOnA1iEAlLxvllHQaz6NWr8m2k5hXb85OhtICznmeSSTJpGG+nRt4TlzLgx/fs5X3OlhbXzATePep/9WGq6LU93eqKcd76QJaBoLtQMYT1cCppRzsKLj1QoFQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=IdrKphhrf27VGh6aqz9uuWMACK5r7ZHw+UjZyBoEbh4=; b=yrQQ2CZh0ll7vpXzxleYWwZpYkeUfZ6hfKVgsJgkiT75gU+7YRG83G6wgPFymAEEC/rTYoqKaqdXZ0TAXlgZas74vTmOrXkm4VrSAfB1EGpwslq4TxNeI1bPcCU9y/3cD2w2GCdvA2iNHZ94v7qsJAJ6e0WDEEWGUi2NrFwD6JU= Received: from DS7PR03CA0154.namprd03.prod.outlook.com (2603:10b6:5:3b2::9) by CY4PR1201MB2470.namprd12.prod.outlook.com (2603:10b6:903:d1::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5017.21; Thu, 24 Feb 2022 16:58:55 +0000 Received: from DM6NAM11FT060.eop-nam11.prod.protection.outlook.com (2603:10b6:5:3b2:cafe::5e) by DS7PR03CA0154.outlook.office365.com (2603:10b6:5:3b2::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5017.23 via Frontend Transport; Thu, 24 Feb 2022 16:58:55 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT060.mail.protection.outlook.com (10.13.173.63) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5017.22 via Frontend Transport; Thu, 24 Feb 2022 16:58:54 +0000 Received: from sbrijesh-desktop.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Thu, 24 Feb 2022 10:58:47 -0600 From: Brijesh Singh To: , , , , , , CC: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , "Vitaly Kuznetsov" , Jim Mattson , "Andy Lutomirski" , Dave Hansen , Sergio Lopez , Peter Gonda , "Peter Zijlstra" , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Borislav Petkov , Michael Roth , Vlastimil Babka , "Kirill A . Shutemov" , Andi Kleen , "Dr . David Alan Gilbert" , , , , , Brijesh Singh Subject: [PATCH v11 31/45] x86/sev: Move MSR-based VMGEXITs for CPUID to helper Date: Thu, 24 Feb 2022 10:56:11 -0600 Message-ID: <20220224165625.2175020-32-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220224165625.2175020-1-brijesh.singh@amd.com> References: <20220224165625.2175020-1-brijesh.singh@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8b044f67-7e37-4b63-7b66-08d9f7b6f108 X-MS-TrafficTypeDiagnostic: CY4PR1201MB2470:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ngQ8gRPiSqsZh4KeULNwSOvhB8+yv7TfuE4N4r0V9Yt3MJvjDss1LVSAbPKBOcR1s1fK5UeMgLC73Cx5MGlviPHmz32T5VfwsklsGRq3CVQx4fb8aDZoz3gR9/YkHfrMr/b0nHe/PiUHruXLpuaTgBuZSLXPIvzlP+DExQawyUYHgdn64fHk+o3gnVA1phIG7EvmAGqzf/tDOhE6ONfj9LZdMw8L489bFS13xMHosX5oiNqeDmzcSj7HNrpC2uBcxojZm8O7vM+tb+wcY40fT2DaWwX2U8P3nXfKOrqb/MY4NgnNAIuhmf0nnIW7OwM5w7JshUTRNni3H3V3NeABkvtlgj5L2MABi297KLBL88kWz/wvblffBeoZ/v8rrtvkAGKUJbSq8Nz90dj1eF13SzoM5ngcWrKNcJll/ZAx3Y/dm5fQ4MV0cBg7B3s9Xg6vDYa0pU3ba+kNdPYwvPZw7AbHNrRyrMsRXgbtq8oJuMZzUZad5qedgqXfio/oTpuD9ANpeGmc+fdA9V13s+Hg/fPgrI7mP5s2mHC2atoc2QPwGYYNbNESzgvHLVW8zUmUA8TgP3zeHqaeV7zLRp6rkjP1/2r3Pify7+g2IBB1yVClBB2tvCYT88Z3byzcpEii+Jkbklul4CKa0nZI7ag23Qm9cGL/U0ZCNGeJlV7oNTwDAVffJDg217Pqeo15sYJvRyzx8KCofDeV7CLN26IeQBcGhOp1h153Eba0znehASo= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(46966006)(40470700004)(36840700001)(36860700001)(40460700003)(356005)(81166007)(2906002)(44832011)(5660300002)(47076005)(8936002)(7406005)(7416002)(36756003)(83380400001)(508600001)(82310400004)(316002)(54906003)(26005)(2616005)(426003)(16526019)(336012)(86362001)(186003)(1076003)(70586007)(6666004)(70206006)(7696005)(8676002)(110136005)(4326008)(36900700001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2022 16:58:54.8203 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8b044f67-7e37-4b63-7b66-08d9f7b6f108 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT060.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1201MB2470 X-Rspam-User: Authentication-Results: imf22.hostedemail.com; dkim=pass header.d=amd.com header.s=selector1 header.b=yrQQ2CZh; spf=pass (imf22.hostedemail.com: domain of brijesh.singh@amd.com designates 40.107.244.81 as permitted sender) smtp.mailfrom=brijesh.singh@amd.com; dmarc=pass (policy=quarantine) header.from=amd.com X-Rspamd-Server: rspam08 X-Rspamd-Queue-Id: B29D6C000B X-Stat-Signature: ii5qimuirofxc7e83j7zdu8c1p9pofdk X-HE-Tag: 1645721937-757252 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Michael Roth This code will also be used later for SEV-SNP-validated CPUID code in some cases, so move it to a common helper. While here, also add a check to terminate in cases where the CPUID function/subfunction is indexed and the subfunction is non-zero, since the GHCB MSR protocol does not support non-zero subfunctions. Suggested-by: Sean Christopherson Signed-off-by: Michael Roth Signed-off-by: Brijesh Singh --- arch/x86/boot/compressed/sev.c | 1 + arch/x86/kernel/sev-shared.c | 83 +++++++++++++++++++++++----------- arch/x86/kernel/sev.c | 1 + 3 files changed, 59 insertions(+), 26 deletions(-) diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c index 485410a182b0..ed717b6dd246 100644 --- a/arch/x86/boot/compressed/sev.c +++ b/arch/x86/boot/compressed/sev.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "error.h" #include "../msr.h" diff --git a/arch/x86/kernel/sev-shared.c b/arch/x86/kernel/sev-shared.c index 3aaef1a18ffe..b4d5558c9d0a 100644 --- a/arch/x86/kernel/sev-shared.c +++ b/arch/x86/kernel/sev-shared.c @@ -14,6 +14,16 @@ #define has_cpuflag(f) boot_cpu_has(f) #endif +/* I/O parameters for CPUID-related helpers */ +struct cpuid_leaf { + u32 fn; + u32 subfn; + u32 eax; + u32 ebx; + u32 ecx; + u32 edx; +}; + /* * Since feature negotiation related variables are set early in the boot * process they must reside in the .data section so as not to be zeroed @@ -194,6 +204,44 @@ enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb, bool set_ghcb_msr, return verify_exception_info(ghcb, ctxt); } +static int __sev_cpuid_hv(u32 fn, int reg_idx, u32 *reg) +{ + u64 val; + + sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, reg_idx)); + VMGEXIT(); + val = sev_es_rd_ghcb_msr(); + if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) + return -EIO; + + *reg = (val >> 32); + + return 0; +} + +static int sev_cpuid_hv(struct cpuid_leaf *leaf) +{ + int ret; + + /* + * MSR protocol does not support fetching non-zero subfunctions, but is + * sufficient to handle current early-boot cases. Should that change, + * make sure to report an error rather than ignoring the index and + * grabbing random values. If this issue arises in the future, handling + * can be added here to use GHCB-page protocol for cases that occur late + * enough in boot that GHCB page is available. + */ + if (cpuid_function_is_indexed(leaf->fn) && leaf->subfn) + return -EINVAL; + + ret = __sev_cpuid_hv(leaf->fn, GHCB_CPUID_REQ_EAX, &leaf->eax); + ret = ret ? : __sev_cpuid_hv(leaf->fn, GHCB_CPUID_REQ_EBX, &leaf->ebx); + ret = ret ? : __sev_cpuid_hv(leaf->fn, GHCB_CPUID_REQ_ECX, &leaf->ecx); + ret = ret ? : __sev_cpuid_hv(leaf->fn, GHCB_CPUID_REQ_EDX, &leaf->edx); + + return ret; +} + /* * Boot VC Handler - This is the first VC handler during boot, there is no GHCB * page yet, so it only supports the MSR based communication with the @@ -201,40 +249,23 @@ enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb, bool set_ghcb_msr, */ void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code) { + unsigned int subfn = lower_bits(regs->cx, 32); unsigned int fn = lower_bits(regs->ax, 32); - unsigned long val; + struct cpuid_leaf leaf; /* Only CPUID is supported via MSR protocol */ if (exit_code != SVM_EXIT_CPUID) goto fail; - sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EAX)); - VMGEXIT(); - val = sev_es_rd_ghcb_msr(); - if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) - goto fail; - regs->ax = val >> 32; - - sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EBX)); - VMGEXIT(); - val = sev_es_rd_ghcb_msr(); - if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) - goto fail; - regs->bx = val >> 32; - - sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_ECX)); - VMGEXIT(); - val = sev_es_rd_ghcb_msr(); - if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) + leaf.fn = fn; + leaf.subfn = subfn; + if (sev_cpuid_hv(&leaf)) goto fail; - regs->cx = val >> 32; - sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EDX)); - VMGEXIT(); - val = sev_es_rd_ghcb_msr(); - if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) - goto fail; - regs->dx = val >> 32; + regs->ax = leaf.eax; + regs->bx = leaf.ebx; + regs->cx = leaf.ecx; + regs->dx = leaf.edx; /* * This is a VC handler and the #VC is only raised when SEV-ES is diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index 439c2f963e17..b876b1d989eb 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -33,6 +33,7 @@ #include #include #include +#include #define DR7_RESET_VALUE 0x400