diff mbox series

[RFC,v0,2/6] x86/cpufeatures: Add Upper Address Ignore(UAI) as CPU feature

Message ID 20220310111545.10852-3-bharata@amd.com (mailing list archive)
State New
Headers show
Series x86/AMD: Userspace address tagging | expand

Commit Message

Bharata B Rao March 10, 2022, 11:15 a.m. UTC 
Currently the maximum logical address size for AMD processors in
64 bit mode is 57 bits. This means that the remaining 7 upper bits
[63:57] are available for software use. With UAI feature turned ON,
the processor ignores these upper bits when performing canonical
check on these addresses.

Add UAI as a CPU feature.

Signed-off-by: Bharata B Rao <bharata@amd.com>
---
 arch/x86/include/asm/cpufeatures.h | 2 +-
 arch/x86/kernel/cpu/scattered.c    | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 6db4e2932b3d..5f4e88e67feb 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -201,7 +201,7 @@ 
 #define X86_FEATURE_INVPCID_SINGLE	( 7*32+ 7) /* Effectively INVPCID && CR4.PCIDE=1 */
 #define X86_FEATURE_HW_PSTATE		( 7*32+ 8) /* AMD HW-PState */
 #define X86_FEATURE_PROC_FEEDBACK	( 7*32+ 9) /* AMD ProcFeedbackInterface */
-/* FREE!                                ( 7*32+10) */
+#define X86_FEATURE_UAI			( 7*32+10) /* AMD Upper Address Ignore */
 #define X86_FEATURE_PTI			( 7*32+11) /* Kernel Page Table Isolation enabled */
 #define X86_FEATURE_RETPOLINE		( 7*32+12) /* "" Generic Retpoline mitigation for Spectre variant 2 */
 #define X86_FEATURE_RETPOLINE_AMD	( 7*32+13) /* "" AMD Retpoline mitigation for Spectre variant 2 */
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 21d1f062895a..5c19f6f525cf 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -42,6 +42,7 @@  static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },
 	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
 	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
+	{ X86_FEATURE_UAI,		CPUID_EAX,  7, 0x80000021, 0 },
 	{ 0, 0, 0, 0, 0 }
 };