From patchwork Fri Jun 10 14:35:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 12877658 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 166C0C43334 for ; Fri, 10 Jun 2022 14:35:35 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 8675A8D00B4; Fri, 10 Jun 2022 10:35:34 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 8170D8D009C; Fri, 10 Jun 2022 10:35:34 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 6B7F68D00B3; Fri, 10 Jun 2022 10:35:34 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id 5DE3C8D009C for ; Fri, 10 Jun 2022 10:35:34 -0400 (EDT) Received: from smtpin30.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay13.hostedemail.com (Postfix) with ESMTP id 2C1646138D for ; Fri, 10 Jun 2022 14:35:34 +0000 (UTC) X-FDA: 79562574588.30.492FD80 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by imf22.hostedemail.com (Postfix) with ESMTP id 0E7B6C0090 for ; Fri, 10 Jun 2022 14:35:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654871733; x=1686407733; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Q31itKy4PC7SvEU3qrX2Ci7VMhO97r4+bi4c5XZJr5s=; b=DHvqZFoHgQwOGLhsHFb0AGUAFE+AyhEp82AicElnmU4sHVLAvQnC7+st 1FLgudPdjI3CI+/0tXs6qQjUrMn25Ul0JPwn+alfrAkByu8L/8baBQndH nksgON70EgoLkWutCz/WuECtvcH9aG16SxuGKn1LpmoLIpcrr1lOTyYVE uQaqFJUSrMIRjsbvqlVOpA8SGIUmjSVNGFA6cy+U61XYOwdnPAj61efAS lsUAq5lAIiMuC4aX9NXve7Nq2rC82bFAta1H30jFkWGeI9BVbBSViCgYy WxAkApAsoNmpw0WibkvZO8q7y++uTSdckYLi+ZKLWlgvnVy8o6Z3cMzJf Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10374"; a="341706099" X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="341706099" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:35:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,290,1647327600"; d="scan'208";a="581096259" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 10 Jun 2022 07:35:26 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id 2D6F5346; Fri, 10 Jun 2022 17:35:30 +0300 (EEST) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv3 2/8] x86: CPUID and CR3/CR4 flags for Linear Address Masking Date: Fri, 10 Jun 2022 17:35:21 +0300 Message-Id: <20220610143527.22974-3-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> References: <20220610143527.22974-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1654871733; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=+Dy1o3+Mxw8mO9UJSctH3izUpAMk4AbyJmLiBQmsecg=; b=E63RH/6tIMs5orCIsF4Kh9qE6mEpoMWD6i0Eng67yHcxZLmrYsYZVgiroGaOBgdeYsfEtT JJ914h98Cx8UtXGfUnmw5AMP9P2iaBgONCHHI5U58kIQmUgL5HdBu06KyDf6bGfW1IUtyk vDdAvxZpV8oNTtw3ZcFvBRJ6EZMdmQI= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1654871733; a=rsa-sha256; cv=none; b=QGi1eRCWT348X6Zvlm6frA9jVGrD8Q1wTeKh9m+19/SFoOnVGmVWR77OwWZgJBEBJ1P4ms O0MgUtSK2sIudwDLBsQHfbT9hslXxlSSYtjJ5jcsPWJVTllSahYKhTu4O3yx7clp1SOhtV y7K8Aj+TuZmEBvY4SaH/4plsX/RBeCQ= ARC-Authentication-Results: i=1; imf22.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=DHvqZFoH; dmarc=pass (policy=none) header.from=intel.com; spf=none (imf22.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.100) smtp.mailfrom=kirill.shutemov@linux.intel.com Authentication-Results: imf22.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=DHvqZFoH; dmarc=pass (policy=none) header.from=intel.com; spf=none (imf22.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.100) smtp.mailfrom=kirill.shutemov@linux.intel.com X-Rspamd-Server: rspam08 X-Rspam-User: X-Stat-Signature: 9brjwcxg31qoysn54xmqqft7eqhs7xm6 X-Rspamd-Queue-Id: 0E7B6C0090 X-HE-Tag: 1654871732-914056 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Enumerate Linear Address Masking and provide defines for CR3 and CR4 flags. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/uapi/asm/processor-flags.h | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 393f2bbb5e3a..9835ab09b590 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -300,6 +300,7 @@ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ #define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */ +#define X86_FEATURE_LAM (12*32+26) /* Linear Address Masking */ /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include/uapi/asm/processor-flags.h index c47cc7f2feeb..d898432947ff 100644 --- a/arch/x86/include/uapi/asm/processor-flags.h +++ b/arch/x86/include/uapi/asm/processor-flags.h @@ -82,6 +82,10 @@ #define X86_CR3_PCID_BITS 12 #define X86_CR3_PCID_MASK (_AC((1UL << X86_CR3_PCID_BITS) - 1, UL)) +#define X86_CR3_LAM_U57_BIT 61 /* Activate LAM for userspace, 62:57 bits masked */ +#define X86_CR3_LAM_U57 _BITULL(X86_CR3_LAM_U57_BIT) +#define X86_CR3_LAM_U48_BIT 62 /* Activate LAM for userspace, 62:48 bits masked */ +#define X86_CR3_LAM_U48 _BITULL(X86_CR3_LAM_U48_BIT) #define X86_CR3_PCID_NOFLUSH_BIT 63 /* Preserve old PCID */ #define X86_CR3_PCID_NOFLUSH _BITULL(X86_CR3_PCID_NOFLUSH_BIT) @@ -132,6 +136,8 @@ #define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT) #define X86_CR4_CET_BIT 23 /* enable Control-flow Enforcement Technology */ #define X86_CR4_CET _BITUL(X86_CR4_CET_BIT) +#define X86_CR4_LAM_SUP_BIT 28 /* LAM for supervisor pointers */ +#define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT) /* * x86-64 Task Priority Register, CR8