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[47.72.206.164]) by smtp.gmail.com with ESMTPSA id a11-20020a1709027e4b00b0016a3b5a46f0sm27907831pln.241.2022.07.07.05.53.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jul 2022 05:53:26 -0700 (PDT) From: Barry Song <21cnbao@gmail.com> To: akpm@linux-foundation.org, linux-mm@kvack.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, catalin.marinas@arm.com, will@kernel.org, linux-doc@vger.kernel.org Cc: corbet@lwn.net, arnd@arndb.de, linux-kernel@vger.kernel.org, darren@os.amperecomputing.com, yangyicong@hisilicon.com, huzhanyuan@oppo.com, lipeifeng@oppo.com, zhangshiming@oppo.com, guojian@oppo.com, realmz6@gmail.com, Barry Song , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Nadav Amit , Mel Gorman Subject: [PATCH 3/4] mm: rmap: Extend tlbbatch APIs to fit new platforms Date: Fri, 8 Jul 2022 00:52:41 +1200 Message-Id: <20220707125242.425242-4-21cnbao@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220707125242.425242-1-21cnbao@gmail.com> References: <20220707125242.425242-1-21cnbao@gmail.com> MIME-Version: 1.0 ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1657198407; a=rsa-sha256; cv=none; b=sNtfwxnona8Oa9BFZFShNfrFjSH8rF32OBaJkUGnRfC+lWe8nImQoyL4iLq4R3Z2mbF16q hlXQCv0vGUuG48sNfg7DfYPlVXQPbNd6JsL/urwYhHvQlyzp8KAiIx0fNrgLs6TG4IjGEm E+UysM+QsqV2pf68BCwNxJq4IVAuaxA= ARC-Authentication-Results: i=1; imf01.hostedemail.com; dkim=pass header.d=gmail.com header.s=20210112 header.b=nrNTLh5d; dmarc=pass (policy=none) header.from=gmail.com; spf=pass (imf01.hostedemail.com: domain of 21cnbao@gmail.com designates 209.85.215.171 as permitted sender) smtp.mailfrom=21cnbao@gmail.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1657198407; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=6hOJXYJTQiFMMMc5LL8OXOjbAEOIGj7/DEojQqeqmtE=; b=P+T2FnminIiWCMDi2JjWIzzlEB0z5qv9l8iZeyjAh2XFbVCPXNOwgVjL+gwdeksHbdhh+w PnevTwMW6hWScd0k/LB+eq09QUhgwORcmaM8WVSREV0aVKe3u2j939QapaxTFlVW0O8Kxm Vns/+wQRh6UmoZ0JdSf5L+X+oJTg3zI= X-Stat-Signature: ch4roj6bmomhhfimeef3driw81ddj6iu X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 7ECE440010 Authentication-Results: imf01.hostedemail.com; dkim=pass header.d=gmail.com header.s=20210112 header.b=nrNTLh5d; dmarc=pass (policy=none) header.from=gmail.com; spf=pass (imf01.hostedemail.com: domain of 21cnbao@gmail.com designates 209.85.215.171 as permitted sender) smtp.mailfrom=21cnbao@gmail.com X-HE-Tag: 1657198407-678718 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Barry Song Add vma and uaddr to tlbbatch APIs so that platforms like ARM64 are able to apply these two parameters on their specific hard- ware features. For ARM64, this could be sending tlbi into hard- ware queues without waiting for its completion. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: "H. Peter Anvin" Cc: Nadav Amit Cc: Mel Gorman Signed-off-by: Barry Song --- arch/x86/include/asm/tlbflush.h | 4 +++- mm/rmap.c | 12 ++++++++---- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index 4af5579c7ef7..9fc48c103b31 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -251,7 +251,9 @@ static inline u64 inc_mm_tlb_gen(struct mm_struct *mm) } static inline void arch_tlbbatch_add_mm(struct arch_tlbflush_unmap_batch *batch, - struct mm_struct *mm) + struct mm_struct *mm, + struct vm_area_struct *vma, + unsigned long uaddr) { inc_mm_tlb_gen(mm); cpumask_or(&batch->cpumask, &batch->cpumask, mm_cpumask(mm)); diff --git a/mm/rmap.c b/mm/rmap.c index d320c29a4ad8..2b5b740d0001 100644 --- a/mm/rmap.c +++ b/mm/rmap.c @@ -642,12 +642,14 @@ void try_to_unmap_flush_dirty(void) #define TLB_FLUSH_BATCH_PENDING_LARGE \ (TLB_FLUSH_BATCH_PENDING_MASK / 2) -static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable) +static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable, + struct vm_area_struct *vma, + unsigned long uaddr) { struct tlbflush_unmap_batch *tlb_ubc = ¤t->tlb_ubc; int batch, nbatch; - arch_tlbbatch_add_mm(&tlb_ubc->arch, mm); + arch_tlbbatch_add_mm(&tlb_ubc->arch, mm, vma, uaddr); tlb_ubc->flush_required = true; /* @@ -737,7 +739,9 @@ void flush_tlb_batched_pending(struct mm_struct *mm) } } #else -static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable) +static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable, + struct vm_area_struct *vma, + unsigned long uaddr) { } @@ -1600,7 +1604,7 @@ static bool try_to_unmap_one(struct folio *folio, struct vm_area_struct *vma, */ pteval = ptep_get_and_clear(mm, address, pvmw.pte); - set_tlb_ubc_flush_pending(mm, pte_dirty(pteval)); + set_tlb_ubc_flush_pending(mm, pte_dirty(pteval), vma, address); } else { pteval = ptep_clear_flush(vma, address, pvmw.pte); }