[PATCHv10,01/15] x86/mm: Fix CR3_ADDR_MASK

Message ID	20221018113358.7833-2-kirill.shutemov@linux.intel.com (mailing list archive)
State	New
Headers	show Return-Path: <owner-linux-mm@kvack.org> From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> To: Dave Hansen <dave.hansen@linux.intel.com>, Andy Lutomirski <luto@kernel.org>, Peter Zijlstra <peterz@infradead.org> Cc: x86@kernel.org, Kostya Serebryany <kcc@google.com>, Andrey Ryabinin <ryabinin.a.a@gmail.com>, Andrey Konovalov <andreyknvl@gmail.com>, Alexander Potapenko <glider@google.com>, Taras Madan <tarasmadan@google.com>, Dmitry Vyukov <dvyukov@google.com>, "H . J . Lu" <hjl.tools@gmail.com>, Andi Kleen <ak@linux.intel.com>, Rick Edgecombe <rick.p.edgecombe@intel.com>, Bharata B Rao <bharata@amd.com>, Jacob Pan <jacob.jun.pan@linux.intel.com>, Ashok Raj <ashok.raj@intel.com>, linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Subject: [PATCHv10 01/15] x86/mm: Fix CR3_ADDR_MASK Date: Tue, 18 Oct 2022 14:33:44 +0300 Message-Id: <20221018113358.7833-2-kirill.shutemov@linux.intel.com> In-Reply-To: <20221018113358.7833-1-kirill.shutemov@linux.intel.com> References: <20221018113358.7833-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: owner-linux-mm@kvack.org Precedence: bulk
Series	Linear Address Masking enabling \| expand [PATCHv10,00/15] Linear Address Masking enabling [PATCHv10,01/15] x86/mm: Fix CR3_ADDR_MASK [PATCHv10,02/15] x86: CPUID and CR3/CR4 flags for Linear Address Masking [PATCHv10,03/15] mm: Pass down mm_struct to untagged_addr() [PATCHv10,04/15] x86/mm: Handle LAM on context switch [PATCHv10,05/15] x86/uaccess: Provide untagged_addr() and remove tags before address check [PATCHv10,06/15] KVM: Serialize tagged address check against tagging enabling [PATCHv10,07/15] x86/mm: Provide arch_prctl() interface for LAM [PATCHv10,08/15] x86/mm: Reduce untagged_addr() overhead until the first LAM user [PATCHv10,09/15] x86: Expose untagging mask in /proc/$PID/arch_status [PATCHv10,10/15] x86/mm, iommu/sva: Make LAM and SVM mutually exclusive [PATCHv10,11/15] selftests/x86/lam: Add malloc and tag-bits test cases for linear-address masking [PATCHv10,12/15] selftests/x86/lam: Add mmap and SYSCALL test cases for linear-address masking [PATCHv10,13/15] selftests/x86/lam: Add io_uring test cases for linear-address masking [PATCHv10,14/15] selftests/x86/lam: Add inherit test cases for linear-address masking [PATCHv10,15/15] selftests/x86/lam: Add ARCH_FORCE_TAGGED_SVM test cases for linear-address masking

Message ID

20221018113358.7833-2-kirill.shutemov@linux.intel.com (mailing list archive)

State

New

Headers

From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Dave Hansen <dave.hansen@linux.intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>
Cc: x86@kernel.org,
	Kostya Serebryany <kcc@google.com>,
	Andrey Ryabinin <ryabinin.a.a@gmail.com>,
	Andrey Konovalov <andreyknvl@gmail.com>,
	Alexander Potapenko <glider@google.com>,
	Taras Madan <tarasmadan@google.com>,
	Dmitry Vyukov <dvyukov@google.com>,
	"H . J . Lu" <hjl.tools@gmail.com>,
	Andi Kleen <ak@linux.intel.com>,
	Rick Edgecombe <rick.p.edgecombe@intel.com>,
	Bharata B Rao <bharata@amd.com>,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Ashok Raj <ashok.raj@intel.com>,
	linux-mm@kvack.org,
	linux-kernel@vger.kernel.org,
	"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: [PATCHv10 01/15] x86/mm: Fix CR3_ADDR_MASK
Date: Tue, 18 Oct 2022 14:33:44 +0300
Message-Id: <20221018113358.7833-2-kirill.shutemov@linux.intel.com>
In-Reply-To: <20221018113358.7833-1-kirill.shutemov@linux.intel.com>
References: <20221018113358.7833-1-kirill.shutemov@linux.intel.com>
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Sender: owner-linux-mm@kvack.org
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Series

Linear Address Masking enabling | expand

Commit Message

Kirill A. Shutemov Oct. 18, 2022, 11:33 a.m. UTC

The mask must not include bits above physical address mask. These bits
are reserved and can be used for other things. Bits 61 and 62 are used
for Linear Address Masking.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
Reviewed-by: Alexander Potapenko <glider@google.com>
Tested-by: Alexander Potapenko <glider@google.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/x86/include/asm/processor-flags.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/processor-flags.h
index 02c2cbda4a74..a7f3d9100adb 100644
--- a/arch/x86/include/asm/processor-flags.h
+++ b/arch/x86/include/asm/processor-flags.h
@@ -35,7 +35,7 @@ 
  */
 #ifdef CONFIG_X86_64
 /* Mask off the address space ID and SME encryption bits. */
-#define CR3_ADDR_MASK	__sme_clr(0x7FFFFFFFFFFFF000ull)
+#define CR3_ADDR_MASK	__sme_clr(PHYSICAL_PAGE_MASK)
 #define CR3_PCID_MASK	0xFFFull
 #define CR3_NOFLUSH	BIT_ULL(63)

[PATCHv10,01/15] x86/mm: Fix CR3_ADDR_MASK

Commit Message

Patch