From patchwork Fri Nov 4 22:35:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgecombe, Rick P" X-Patchwork-Id: 13032668 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 088A2C433FE for ; Fri, 4 Nov 2022 22:40:08 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id C2B768E0007; Fri, 4 Nov 2022 18:39:50 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id BDD348E0018; Fri, 4 Nov 2022 18:39:50 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 8F5C78E0007; Fri, 4 Nov 2022 18:39:50 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0013.hostedemail.com [216.40.44.13]) by kanga.kvack.org (Postfix) with ESMTP id 6BF948E0018 for ; Fri, 4 Nov 2022 18:39:50 -0400 (EDT) Received: from smtpin18.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id 4F237140950 for ; Fri, 4 Nov 2022 22:39:50 +0000 (UTC) X-FDA: 80097228540.18.8FBFDD5 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by imf17.hostedemail.com (Postfix) with ESMTP id C982F40005 for ; Fri, 4 Nov 2022 22:39:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667601589; x=1699137589; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=xYUN5lPpKChBVK2npDRqZ1rxSFprNl3Bqg8OsGm5TD4=; b=ZSH+qlATCO/ihaE7PpMobQTKguBrt94upCcfYvwGMiM/zXhu5Ul2gVbs dlkc1CQpgmyMNUNvrQ7e/WzxNB85AxKT7G/o8snDxRVljyqTlJ+cd42oW CW1CwDuTCbNbSuPVgMgIjukSzRN4QyYIaKB3REQvL0UmtY1QsxrAplQhb QxXSnHpxnct/aeq+rYiqH48CLCoW6JoGePR1hs52DE8a0hy736Sw4+xCD Z+11wUmmHi4jaYX35Q/SRyhgz4sW27BtWA2jODLEbKOJDondpiVRcVnP6 2I1qgJw0RCaZ7v+FabnZdIF0oV36FEcir/2znm5uU7T9uiDHuYU45QAOY Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10521"; a="297559709" X-IronPort-AV: E=Sophos;i="5.96,138,1665471600"; d="scan'208";a="297559709" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2022 15:39:49 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10521"; a="668514139" X-IronPort-AV: E=Sophos;i="5.96,138,1665471600"; d="scan'208";a="668514139" Received: from adhjerms-mobl1.amr.corp.intel.com (HELO rpedgeco-desk.amr.corp.intel.com) ([10.212.227.68]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2022 15:39:48 -0700 From: Rick Edgecombe To: x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V . Shankar" , Weijiang Yang , "Kirill A . Shutemov" , John Allen , kcc@google.com, eranian@google.com, rppt@kernel.org, jamorris@linux.microsoft.com, dethoma@microsoft.com, akpm@linux-foundation.org Cc: rick.p.edgecombe@intel.com Subject: [PATCH v3 30/37] x86/shstk: Support wrss for userspace Date: Fri, 4 Nov 2022 15:35:57 -0700 Message-Id: <20221104223604.29615-31-rick.p.edgecombe@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221104223604.29615-1-rick.p.edgecombe@intel.com> References: <20221104223604.29615-1-rick.p.edgecombe@intel.com> ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1667601590; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references:dkim-signature; bh=jYJvV5iMfPmkDGiHFT8a79PJw+Qr0OeWIjZvDhBR51Y=; b=R6WpHk8y/1T08GUTL28a644XnFv4WOpflZ+1peUGgL+v7KIBUK6R39PugK0ySDLTQSliLH /P6rvGLc8Hyw9A6HlHdLE89rxmcvFC/Uk6W3OEpfy1JJKopUinLnIX6efGOwb/YxW6YX3Q US+DK9sbyZyS+/Fxos7RptrmNWcakeY= ARC-Authentication-Results: i=1; imf17.hostedemail.com; dkim=none ("invalid DKIM record") header.d=intel.com header.s=Intel header.b=ZSH+qlAT; spf=pass (imf17.hostedemail.com: domain of rick.p.edgecombe@intel.com designates 134.134.136.20 as permitted sender) smtp.mailfrom=rick.p.edgecombe@intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1667601590; a=rsa-sha256; cv=none; b=5ZlIwzUd9NBMZVPKj5XhlCrhbRhDK5bGDUud696c0tU9gkCOSEvOyZ3+m01kMGGq+O5Yqx gV1YIed3k69gPHhaeAxESRMTUyBvCUyWPVUjZTQjLs2PWzJCt5YKbpYjOOF3A0SL1kPUtP qZ91dB67jByZ5pzyX9K8gfFNMzTCjSM= Authentication-Results: imf17.hostedemail.com; dkim=none ("invalid DKIM record") header.d=intel.com header.s=Intel header.b=ZSH+qlAT; spf=pass (imf17.hostedemail.com: domain of rick.p.edgecombe@intel.com designates 134.134.136.20 as permitted sender) smtp.mailfrom=rick.p.edgecombe@intel.com; dmarc=pass (policy=none) header.from=intel.com X-Stat-Signature: 3xof9bu5cmk8gm15fpfamqjna9u7m3qp X-Rspam-User: X-Rspamd-Server: rspam11 X-Rspamd-Queue-Id: C982F40005 X-HE-Tag: 1667601589-43073 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: For the current shadow stack implementation, shadow stacks contents can't easily be provisioned with arbitrary data. This property helps apps protect themselves better, but also restricts any potential apps that may want to do exotic things at the expense of a little security. The x86 shadow stack feature introduces a new instruction, wrss, which can be enabled to write directly to shadow stack permissioned memory from userspace. Allow it to get enabled via the prctl interface. Only enable the userspace wrss instruction, which allows writes to userspace shadow stacks from userspace. Do not allow it to be enabled independently of shadow stack, as HW does not support using WRSS when shadow stack is disabled. From a fault handler perspective, WRSS will behave very similar to WRUSS, which is treated like a user access from a #PF err code perspective. Tested-by: Pengfei Xu Tested-by: John Allen Signed-off-by: Rick Edgecombe --- v3: - Make wrss_control() static - Fix verbiage in commit log (Kees) v2: - Add some commit log verbiage from (Dave Hansen) v1: - New patch. arch/x86/include/uapi/asm/prctl.h | 1 + arch/x86/kernel/shstk.c | 33 +++++++++++++++++++++++++++++-- 2 files changed, 32 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/uapi/asm/prctl.h b/arch/x86/include/uapi/asm/prctl.h index dad5288bf086..5f1d3181e4a1 100644 --- a/arch/x86/include/uapi/asm/prctl.h +++ b/arch/x86/include/uapi/asm/prctl.h @@ -28,5 +28,6 @@ /* ARCH_CET_ features bits */ #define CET_SHSTK (1ULL << 0) +#define CET_WRSS (1ULL << 1) #endif /* _ASM_X86_PRCTL_H */ diff --git a/arch/x86/kernel/shstk.c b/arch/x86/kernel/shstk.c index 9a025eea520f..cbd0970b26d7 100644 --- a/arch/x86/kernel/shstk.c +++ b/arch/x86/kernel/shstk.c @@ -364,6 +364,35 @@ void shstk_free(struct task_struct *tsk) unmap_shadow_stack(shstk->base, shstk->size); } +static int wrss_control(bool enable) +{ + if (!cpu_feature_enabled(X86_FEATURE_USER_SHSTK)) + return -EOPNOTSUPP; + + /* + * Only enable wrss if shadow stack is enabled. If shadow stack is not + * enabled, wrss will already be disabled, so don't bother clearing it + * when disabling. + */ + if (!features_enabled(CET_SHSTK)) + return -EPERM; + + /* Already enabled/disabled? */ + if (features_enabled(CET_WRSS) == enable) + return 0; + + fpregs_lock_and_load(); + if (enable) { + set_clr_bits_msrl(MSR_IA32_U_CET, CET_WRSS_EN, 0); + features_set(CET_WRSS); + } else { + set_clr_bits_msrl(MSR_IA32_U_CET, 0, CET_WRSS_EN); + features_clr(CET_WRSS); + } + fpregs_unlock(); + + return 0; +} static int shstk_disable(void) { @@ -376,12 +405,12 @@ static int shstk_disable(void) fpregs_lock_and_load(); /* Disable WRSS too when disabling shadow stack */ - set_clr_bits_msrl(MSR_IA32_U_CET, 0, CET_SHSTK_EN); + set_clr_bits_msrl(MSR_IA32_U_CET, 0, CET_SHSTK_EN | CET_WRSS_EN); wrmsrl(MSR_IA32_PL3_SSP, 0); fpregs_unlock(); shstk_free(current); - features_clr(CET_SHSTK); + features_clr(CET_SHSTK | CET_WRSS); return 0; }