From patchwork Wed Dec 14 19:40:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Roth X-Patchwork-Id: 13073398 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53DEAC4332F for ; Wed, 14 Dec 2022 19:53:09 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id CF59A8E0005; Wed, 14 Dec 2022 14:53:08 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id CA5998E0002; Wed, 14 Dec 2022 14:53:08 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id B46BA8E0005; Wed, 14 Dec 2022 14:53:08 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id A393B8E0002 for ; Wed, 14 Dec 2022 14:53:08 -0500 (EST) Received: from smtpin06.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay09.hostedemail.com (Postfix) with ESMTP id 75F2B80557 for ; Wed, 14 Dec 2022 19:53:08 +0000 (UTC) X-FDA: 80241960456.06.41572EA Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2087.outbound.protection.outlook.com [40.107.94.87]) by imf17.hostedemail.com (Postfix) with ESMTP id 77C7C40016 for ; Wed, 14 Dec 2022 19:53:05 +0000 (UTC) Authentication-Results: imf17.hostedemail.com; dkim=pass header.d=amd.com header.s=selector1 header.b=edzldjzU; arc=pass ("microsoft.com:s=arcselector9901:i=1"); spf=pass (imf17.hostedemail.com: domain of Michael.Roth@amd.com designates 40.107.94.87 as permitted sender) smtp.mailfrom=Michael.Roth@amd.com; dmarc=pass (policy=quarantine) header.from=amd.com ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1671047585; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=RNuCOPLhGkj2ZKgj57cn7yE9zrZbhXJooEIkMA/0dAg=; b=PfZ1KhVgDMijscRMWev5aFEgyN8rrHRd4FqBACedOItzkuxkYPWoIJ1wGHlm19J4jwPgXL +4VgAsVTvFqv59GfqlYyzNTEMkE5Iuvq5UgCkGGf2/YMvHPaKfz9SedBa22IuETld6CVgg hBxxY6pE+hqSR4KarDAhHF4+bLmN808= ARC-Authentication-Results: i=2; imf17.hostedemail.com; dkim=pass header.d=amd.com header.s=selector1 header.b=edzldjzU; arc=pass ("microsoft.com:s=arcselector9901:i=1"); spf=pass (imf17.hostedemail.com: domain of Michael.Roth@amd.com designates 40.107.94.87 as permitted sender) smtp.mailfrom=Michael.Roth@amd.com; dmarc=pass (policy=quarantine) header.from=amd.com ARC-Seal: i=2; s=arc-20220608; d=hostedemail.com; t=1671047585; a=rsa-sha256; cv=pass; b=gW66Pcb7Gp9p/DwpblZ/FNSe5aX+n1AXdafLhBJTKxIIp5c4hBj0jEGoBbjxJ1k+szvO19 ZtVNUejto/dhC0t+MyxQctgDEMXJcxbyYyhQvVofDUggngdx3Ou8MC/caIDLk/diEXO+hT AsjlW3Q1c1iYUS6P4imSM0JemzKqioA= ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=gzhSewsKPdxyI2rU9xBFhBAZs/7+8THWHE98jtbFhZ+e1qGurii3ZGnWRCE4Sr8Ngj+Q5hf4VdYKkX/IuggkTVF+YgX5hPfDnLunv5nj/ENq+6b0HZMOUc7VXMr7cvb5heq7uSQpgsIGpVTrjzMiEb7VGrjGL+px842N7FP1nx0Zkx7zstPfmzrUmCPlO8zAvOGV9pWOkUHMCZVOqQlCnVpnszEty9NM90gaBIN7ri1cPP4xkOfK9uH5CR8qcWgp8+1Lpikfseh+oEKVNn7r9Vxn3M4OH+ThNVV8Ckeg51tREUS+fmFTphKjrrL2zeH/buAyUO/X2OvboZxAt5l/CQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=RNuCOPLhGkj2ZKgj57cn7yE9zrZbhXJooEIkMA/0dAg=; b=McnhUVbklKQEOhqhaKy9NDaiZaWYF6Ig6/q7UagEEPZWRnGY5/nLyb+uBy8tU7Pm9nyaDahgX2x7OLq64BHUnU42ABTMVmnRldDOws6Z1FZCsyGT6fUnX6YySoPUpTH0JErf0NhHEEOnUKCInqFeGs9F9A2JLucYrDnRT57Sc6heDt0aWO2sB7UoEnPfdsILHmyhQSytubjqk+m9lBDnTKN/CudcFSoUkvZVKC99Hykl6OjYKz3BB8zkPrZdByCB3tS96BcFEqSlq/nDnNle+6wqRWO17PkFa/piUi81mc0Q6aaht9Rt+b2kGqbfKbHwGR4pxJOtwd9uNlyUmLWy7Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=vger.kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RNuCOPLhGkj2ZKgj57cn7yE9zrZbhXJooEIkMA/0dAg=; b=edzldjzU355iQOFNxML4Ql+YpkW2t60xGotIqHrcvBH4e1LIQgv82F+UZWaMX5ZdeXyCI8Zrsfluj7iuiIuzh6y/t296J10hiy1P/9wFQqa6x18Ar630tR2Km0f+IgB4+6WXfsdb7VqF9kzwQZRgWH0i/eD2IC2r7ZXuBWrx9Cs= Received: from CY5PR17CA0014.namprd17.prod.outlook.com (2603:10b6:930:17::23) by CY8PR12MB7291.namprd12.prod.outlook.com (2603:10b6:930:54::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5880.19; Wed, 14 Dec 2022 19:53:02 +0000 Received: from CY4PEPF0000C97A.namprd02.prod.outlook.com (2603:10b6:930:17:cafe::8d) by CY5PR17CA0014.outlook.office365.com (2603:10b6:930:17::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5924.11 via Frontend Transport; Wed, 14 Dec 2022 19:53:02 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000C97A.mail.protection.outlook.com (10.167.241.138) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5924.10 via Frontend Transport; Wed, 14 Dec 2022 19:53:02 +0000 Received: from localhost (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Wed, 14 Dec 2022 13:53:01 -0600 From: Michael Roth To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Brijesh Singh Subject: [PATCH RFC v7 25/64] crypto: ccp: Add support to initialize the AMD-SP for SEV-SNP Date: Wed, 14 Dec 2022 13:40:17 -0600 Message-ID: <20221214194056.161492-26-michael.roth@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221214194056.161492-1-michael.roth@amd.com> References: <20221214194056.161492-1-michael.roth@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C97A:EE_|CY8PR12MB7291:EE_ X-MS-Office365-Filtering-Correlation-Id: 231bf967-f584-4902-1c0a-08dade0ccf6a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9T24pyQYxMAnsOkRc2EebtH8nyE6coC4ppYSepKBkzU8dp2vcYjFz0oRCQPGDj0I90hjXu0lZhXFILqssCkv2EvVWXnlWsZHTCwKpAVKq/fsRG5R5TWM8EBEIdDYVXdU2rYCLmxyH2yk/in5adHrFmMNgWsCCBFp/3bBlaI+bbO3BVdk+MSLIe1hi/tVUqqo7+gTzvWqWRbe5/ylxcqYVd97RTHKVDQjKBqOUFTVNjiwv7C6/1wYpXwpsRxkGBl39Nd2rUWtIjdW0LaNUuwCPqNAMNYjsUJ31/aHCSXyhxDrEYOkVD7BM8WIrrFie9TkLkKI3H89nQ1FWbFwaEf+Ma1VC5SpFKHrN0ohAJDJWTKJJQf7QZawwnY1F8FtYsNcmZnhlwVHPSsVhCYcgvue5EAppGQKB7uaCaV6WsboKIs44KS7MMIo3oXVViw4Fnxp74hh2QxwJ2/JsLuMgyIUvYV6by0QGpc/JX9Q2qu78I/3viXYtw4kNyDGiO+mH1Od2glzRdioH0aWMo0gl413wWVyxCrN07SHowbCnxqjIlB9qlrmEgJCsHNbWEOaZJ+53pMV47CgU4k/xheEGTKX2rjlHb3ywYJpqZLZ0Mo/U9VfB7LKWaxUkRwEGnGz2LX3wdZA0cDo9jMvsLeFjjc7FgdjARwucg2dq5W5TZzELAR63WR8yHMbU5HGWrXCcjXaPyZA6/FvBn/bqXWSRRVo+O5ZtxM6wnGTRcXopTNa+NdPupwXMinnHtknqN/MSC/KdAub/jzKexilz+9vpPB4xA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:CA;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(136003)(39860400002)(346002)(396003)(451199015)(36840700001)(46966006)(40470700004)(478600001)(26005)(6666004)(186003)(82310400005)(7416002)(426003)(316002)(1076003)(336012)(40480700001)(5660300002)(7406005)(16526019)(2906002)(54906003)(83380400001)(70206006)(36756003)(70586007)(36860700001)(4326008)(47076005)(30864003)(8676002)(2616005)(356005)(81166007)(6916009)(86362001)(44832011)(8936002)(41300700001)(40460700003)(82740400003)(36900700001)(134885004);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Dec 2022 19:53:02.6220 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 231bf967-f584-4902-1c0a-08dade0ccf6a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C97A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7291 X-Rspamd-Server: rspam05 X-Rspamd-Queue-Id: 77C7C40016 X-Stat-Signature: x5psqfco6bxjq7oxnt6kphzmfxu993e3 X-Rspam-User: X-HE-Tag: 1671047585-995302 X-HE-Meta: U2FsdGVkX18R2i5rLlM9PR8l2mSUFJUpCxGmJpOPMxTqBx7EZzwkOV6NCDtWg6VaIfNalk50lj1ucAELRqkiBFqWJxW4IpB+mz9oKQlVDaLFcBNB/gc00cYfs4poK7r/sH/DHK6pGU0LLjPP3yDri6RgQtE/+fEn/HVPUsocxMnbbdJAO/VIreCmcnZhV6rKcj1FHTjvhTRwmkXIOIctD7R1Af5A0rS2c3l48703MBdu8v7GoGHgXlcRdHlNURfCeso59OSE2S79lyjxtH4oeEyZ29K5h42GOmpvQXsphm8sm/O2V34bS2WnX/Mn/Zun4cdK0dBfE3fWY4Uy0Zru0Lp793/f3mthjbsaXRujB7MYo31iWHiE0WZDE6+OC0yue/hwICPZBEdnMIm1tmVrkufeUZmRinyMAguYubEu/srjZdJM2vQKS6pwQ6iSvCapZrcA5v9hqPRL/h6RwX8OI4cY95vXYKw4rB9IcZejAsJTl/cO5/hmkmwmSWuCZ1TW5dwQ1G9jLBk0cT2wG9siWWett8BwlQMZBPswAnebI2c6zf9T1w4oXWsuiZPBmLpsxQOMK0dyw6Nt0+RdmsJljrvTUEL6juhOe1JQopMFjcgQzn4+WhV2zt5GYNvSt6aiqC0kpkZwfZre1LlxvmWtCJtmAQakT9NazmFliqV2qsvoRS7UYwYp89nh3/fUHaRJDy8FJW6CuwncriUv2BjEWThmNvEMrOeOpZDCzF54UORxBwwjiAfYmbS73+rGPlP5joX82H1YrDUmc++EN8giMWb96p7pT7sD9mTXbux80dSOzZZDDm22y67veQjFQW1m+SzMj/1avAIqikoLkKe7v+h787nybwx7hO6QPq/cUwO5M2DdEiubf+LiCcQS6lnVeKqDKViigB+rvNcpd0iwGDmZAkQgD4XvaM4Ps1SKP+ffYkBvRiHH6TSSSwZJea+Cemr7QvpHzCVyZw9njmC 9stOed7A TFXff X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Brijesh Singh Before SNP VMs can be launched, the platform must be appropriately configured and initialized. Platform initialization is accomplished via the SNP_INIT command. Make sure to do a WBINVD and issue DF_FLUSH command to prepare for the first SNP guest launch after INIT. During the execution of SNP_INIT command, the firmware configures and enables SNP security policy enforcement in many system components. Some system components write to regions of memory reserved by early x86 firmware (e.g. UEFI). Other system components write to regions provided by the operation system, hypervisor, or x86 firmware. Such system components can only write to HV-fixed pages or Default pages. They will error when attempting to write to other page states after SNP_INIT enables their SNP enforcement. Starting in SNP firmware v1.52, the SNP_INIT_EX command takes a list of system physical address ranges to convert into the HV-fixed page states during the RMP initialization. If INIT_RMP is 1, hypervisors should provide all system physical address ranges that the hypervisor will never assign to a guest until the next RMP re-initialization. For instance, the memory that UEFI reserves should be included in the range list. This allows system components that occasionally write to memory (e.g. logging to UEFI reserved regions) to not fail due to RMP initialization and SNP enablement. Co-developed-by: Ashish Kalra Signed-off-by: Ashish Kalra Signed-off-by: Brijesh Singh Signed-off-by: Michael Roth --- drivers/crypto/ccp/sev-dev.c | 225 +++++++++++++++++++++++++++++++++++ drivers/crypto/ccp/sev-dev.h | 2 + include/linux/psp-sev.h | 17 +++ 3 files changed, 244 insertions(+) diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index 9d84720a41d7..af20420bd6c2 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -26,6 +26,7 @@ #include #include +#include #include "psp-dev.h" #include "sev-dev.h" @@ -34,6 +35,10 @@ #define SEV_FW_FILE "amd/sev.fw" #define SEV_FW_NAME_SIZE 64 +/* Minimum firmware version required for the SEV-SNP support */ +#define SNP_MIN_API_MAJOR 1 +#define SNP_MIN_API_MINOR 51 + static DEFINE_MUTEX(sev_cmd_mutex); static struct sev_misc_dev *misc_dev; @@ -76,6 +81,13 @@ static void *sev_es_tmr; #define NV_LENGTH (32 * 1024) static void *sev_init_ex_buffer; +/* + * SEV_DATA_RANGE_LIST: + * Array containing range of pages that firmware transitions to HV-fixed + * page state. + */ +struct sev_data_range_list *snp_range_list; + static inline bool sev_version_greater_or_equal(u8 maj, u8 min) { struct sev_device *sev = psp_master->sev_data; @@ -830,6 +842,186 @@ static int sev_update_firmware(struct device *dev) return ret; } +static void snp_set_hsave_pa(void *arg) +{ + wrmsrl(MSR_VM_HSAVE_PA, 0); +} + +static int snp_filter_reserved_mem_regions(struct resource *rs, void *arg) +{ + struct sev_data_range_list *range_list = arg; + struct sev_data_range *range = &range_list->ranges[range_list->num_elements]; + size_t size; + + if ((range_list->num_elements * sizeof(struct sev_data_range) + + sizeof(struct sev_data_range_list)) > PAGE_SIZE) + return -E2BIG; + + switch (rs->desc) { + case E820_TYPE_RESERVED: + case E820_TYPE_PMEM: + case E820_TYPE_ACPI: + range->base = rs->start & PAGE_MASK; + size = (rs->end + 1) - rs->start; + range->page_count = size >> PAGE_SHIFT; + range_list->num_elements++; + break; + default: + break; + } + + return 0; +} + +static int __sev_snp_init_locked(int *error) +{ + struct psp_device *psp = psp_master; + struct sev_data_snp_init_ex data; + struct sev_device *sev; + int rc = 0; + + if (!psp || !psp->sev_data) + return -ENODEV; + + sev = psp->sev_data; + + if (sev->snp_initialized) + return 0; + + /* + * The SNP_INIT requires the MSR_VM_HSAVE_PA must be set to 0h + * across all cores. + */ + on_each_cpu(snp_set_hsave_pa, NULL, 1); + + /* + * Starting in SNP firmware v1.52, the SNP_INIT_EX command takes a list of + * system physical address ranges to convert into the HV-fixed page states + * during the RMP initialization. For instance, the memory that UEFI + * reserves should be included in the range list. This allows system + * components that occasionally write to memory (e.g. logging to UEFI + * reserved regions) to not fail due to RMP initialization and SNP enablement. + */ + if (sev_version_greater_or_equal(SNP_MIN_API_MAJOR, 52)) { + /* + * Firmware checks that the pages containing the ranges enumerated + * in the RANGES structure are either in the Default page state or in the + * firmware page state. + */ + snp_range_list = sev_fw_alloc(PAGE_SIZE); + if (!snp_range_list) { + dev_err(sev->dev, + "SEV: SNP_INIT_EX range list memory allocation failed\n"); + return -ENOMEM; + } + + memset(snp_range_list, 0, PAGE_SIZE); + + /* + * Retrieve all reserved memory regions setup by UEFI from the e820 memory map + * to be setup as HV-fixed pages. + */ + + rc = walk_iomem_res_desc(IORES_DESC_NONE, IORESOURCE_MEM, 0, ~0, + snp_range_list, snp_filter_reserved_mem_regions); + if (rc) { + dev_err(sev->dev, + "SEV: SNP_INIT_EX walk_iomem_res_desc failed rc = %d\n", rc); + return rc; + } + + memset(&data, 0, sizeof(data)); + data.init_rmp = 1; + data.list_paddr_en = 1; + data.list_paddr = __pa(snp_range_list); + + rc = __sev_do_cmd_locked(SEV_CMD_SNP_INIT_EX, &data, error); + if (rc) + return rc; + } else { + rc = __sev_do_cmd_locked(SEV_CMD_SNP_INIT, NULL, error); + if (rc) + return rc; + } + + /* Prepare for first SNP guest launch after INIT */ + wbinvd_on_all_cpus(); + rc = __sev_do_cmd_locked(SEV_CMD_SNP_DF_FLUSH, NULL, error); + if (rc) + return rc; + + sev->snp_initialized = true; + dev_dbg(sev->dev, "SEV-SNP firmware initialized\n"); + + return rc; +} + +int sev_snp_init(int *error, bool init_on_probe) +{ + int rc; + + if (!cpu_feature_enabled(X86_FEATURE_SEV_SNP)) + return -ENODEV; + + if (init_on_probe && !psp_init_on_probe) + return 0; + + mutex_lock(&sev_cmd_mutex); + rc = __sev_snp_init_locked(error); + mutex_unlock(&sev_cmd_mutex); + + return rc; +} +EXPORT_SYMBOL_GPL(sev_snp_init); + +static int __sev_snp_shutdown_locked(int *error) +{ + struct sev_device *sev = psp_master->sev_data; + struct sev_data_snp_shutdown_ex data; + int ret; + + if (!sev->snp_initialized) + return 0; + + memset(&data, 0, sizeof(data)); + data.length = sizeof(data); + data.iommu_snp_shutdown = 1; + + wbinvd_on_all_cpus(); + +retry: + ret = __sev_do_cmd_locked(SEV_CMD_SNP_SHUTDOWN_EX, &data, error); + /* SHUTDOWN may require DF_FLUSH */ + if (*error == SEV_RET_DFFLUSH_REQUIRED) { + ret = __sev_do_cmd_locked(SEV_CMD_SNP_DF_FLUSH, NULL, NULL); + if (ret) { + dev_err(sev->dev, "SEV-SNP DF_FLUSH failed\n"); + return ret; + } + goto retry; + } + if (ret) { + dev_err(sev->dev, "SEV-SNP firmware shutdown failed\n"); + return ret; + } + + sev->snp_initialized = false; + dev_dbg(sev->dev, "SEV-SNP firmware shutdown\n"); + + return ret; +} + +static int sev_snp_shutdown(int *error) +{ + int rc; + + mutex_lock(&sev_cmd_mutex); + rc = __sev_snp_shutdown_locked(error); + mutex_unlock(&sev_cmd_mutex); + + return rc; +} + static int sev_ioctl_do_pek_import(struct sev_issue_cmd *argp, bool writable) { struct sev_device *sev = psp_master->sev_data; @@ -1270,6 +1462,8 @@ int sev_dev_init(struct psp_device *psp) static void sev_firmware_shutdown(struct sev_device *sev) { + int error; + sev_platform_shutdown(NULL); if (sev_es_tmr) { @@ -1286,6 +1480,14 @@ static void sev_firmware_shutdown(struct sev_device *sev) get_order(NV_LENGTH)); sev_init_ex_buffer = NULL; } + + if (snp_range_list) { + free_pages((unsigned long)snp_range_list, + get_order(PAGE_SIZE)); + snp_range_list = NULL; + } + + sev_snp_shutdown(&error); } void sev_dev_destroy(struct psp_device *psp) @@ -1341,6 +1543,26 @@ void sev_pci_init(void) } } + /* + * If boot CPU supports SNP, then first attempt to initialize + * the SNP firmware. + */ + if (cpu_feature_enabled(X86_FEATURE_SEV_SNP)) { + if (!sev_version_greater_or_equal(SNP_MIN_API_MAJOR, SNP_MIN_API_MINOR)) { + dev_err(sev->dev, "SEV-SNP support requires firmware version >= %d:%d\n", + SNP_MIN_API_MAJOR, SNP_MIN_API_MINOR); + } else { + rc = sev_snp_init(&error, true); + if (rc) { + /* + * Don't abort the probe if SNP INIT failed, + * continue to initialize the legacy SEV firmware. + */ + dev_err(sev->dev, "SEV-SNP: failed to INIT error %#x\n", error); + } + } + } + /* Obtain the TMR memory area for SEV-ES use */ sev_es_tmr = sev_fw_alloc(SEV_ES_TMR_SIZE); if (!sev_es_tmr) @@ -1356,6 +1578,9 @@ void sev_pci_init(void) dev_err(sev->dev, "SEV: failed to INIT error %#x, rc %d\n", error, rc); + dev_info(sev->dev, "SEV%s API:%d.%d build:%d\n", sev->snp_initialized ? + "-SNP" : "", sev->api_major, sev->api_minor, sev->build); + return; err: diff --git a/drivers/crypto/ccp/sev-dev.h b/drivers/crypto/ccp/sev-dev.h index 666c21eb81ab..34767657beb5 100644 --- a/drivers/crypto/ccp/sev-dev.h +++ b/drivers/crypto/ccp/sev-dev.h @@ -52,6 +52,8 @@ struct sev_device { u8 build; void *cmd_buf; + + bool snp_initialized; }; int sev_dev_init(struct psp_device *psp); diff --git a/include/linux/psp-sev.h b/include/linux/psp-sev.h index 31b045e1926f..8cfe92e82743 100644 --- a/include/linux/psp-sev.h +++ b/include/linux/psp-sev.h @@ -794,6 +794,21 @@ struct sev_data_snp_shutdown_ex { */ int sev_platform_init(int *error); +/** + * sev_snp_init - perform SEV SNP_INIT command + * + * @error: SEV command return code + * @init_on_probe: indicates if called during module probe/init + * + * Returns: + * 0 if the SEV successfully processed the command + * -%ENODEV if the SEV device is not available + * -%ENOTSUPP if the SEV does not support SEV + * -%ETIMEDOUT if the SEV command timed out + * -%EIO if the SEV returned a non-zero return code + */ +int sev_snp_init(int *error, bool init_on_probe); + /** * sev_platform_status - perform SEV PLATFORM_STATUS command * @@ -901,6 +916,8 @@ sev_platform_status(struct sev_user_data_status *status, int *error) { return -E static inline int sev_platform_init(int *error) { return -ENODEV; } +static inline int sev_snp_init(int *error, bool init_on_probe) { return -ENODEV; } + static inline int sev_guest_deactivate(struct sev_data_deactivate *data, int *error) { return -ENODEV; }