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26 Dec 2022 16:29:51 -0800 From: Huang Ying To: Andrew Morton Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org, Huang Ying , Zi Yan , Yang Shi , Baolin Wang , Oscar Salvador , Matthew Wilcox , Bharata B Rao , Alistair Popple , haoxin Subject: [PATCH 8/8] migrate_pages: batch flushing TLB Date: Tue, 27 Dec 2022 08:28:59 +0800 Message-Id: <20221227002859.27740-9-ying.huang@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221227002859.27740-1-ying.huang@intel.com> References: <20221227002859.27740-1-ying.huang@intel.com> MIME-Version: 1.0 X-Stat-Signature: ypwnzjyi98oxfu41t6kw9nun4bbnnm1w X-Rspam-User: X-Rspamd-Queue-Id: AC3BD1A0016 X-Rspamd-Server: rspam06 X-HE-Tag: 1672100995-166062 X-HE-Meta: U2FsdGVkX19oL26DmTQyj7ANrxv8urDyduSgbbyUpjAaveZMcCo8qw0PECy4DtaF7Tjuxu33Abdn4ewbyPIgXBVtAHlGrKtx9oj8mCzriICRkHfukrIVv9HctY24mGHebbIdR99Bg9m4SExcjMm/fzrLPQpZCZrrDFGE0GH/ZTH7LL5tdx/p5ldjBiEpo0ODP9h+A8o1w31Ble2R24pd2C8USBySQndwO7CHRKTlULWl/HX57kJteEMjs5FF2wQq6xhFLjTsBQbevcwpRaBNDhmKopOSfXZaP4A7IT5wDi0Yg3k+v+Z545q0/htk32wOmSluY3bpVSKw3aA/BAFMzR3pVA4M7XR6g9jbRLggLFd2BDgAe/ScRN+EAy8X2STSiTD1b49WSl48Mcq40DiMzSZiqznG/3uaFhazSO5HvdxoSiAZd1cijt7w5phFVeICTLfM9WNSYgIsd4Hlvz99o057VAxTOeCU5v/JMYPSvfjMbo0HBJGDruEq3hsg8raiDxQJt1Rr0hXq2WSV7+BGDvh3xLFPBLE20SO1PSxUNYFXIYnwTleqs479Nj738RI5bB7nJzlXVsG/KcIwRhRc+pJMe4v/d/lr+ub9JOXY+z35kG8CqnhEtlMXnNTWlxXdQufjY1Iv68hYl8xI8P1Ec77GKQ0UQHdwrkN3HLoq+6Sk96lFkQiUzm6bTus/btJe4QKuKJHx0eQvy9C3Qe+1QUaKx/qKMnSMUU+/PBiI7CmhYDREIvBCC8uYLmnvIQKGtWOpmtLjzMTRJzx+fOhgi4OiKDl0O7Jv4Od/yLhAfE7dCzcaSuPovKQ+YOiqaOkmt1W+YU0YsfE/gUGtU2vxQpM3sbonUakkoQ1CFzAbqK1JyhOi7qxV7EyaiQaMgXOqiBDt78BIIjfIGaFf3D6swnZ/1tY+1XpwlSiMRvX995bKkw6nAig/Pq0NWaDKUAJNseVtoCqXMXU= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: The TLB flushing will cost quite some CPU cycles during the folio migration in some situations. For example, when migrate a folio of a process with multiple active threads that run on multiple CPUs. After batching the _unmap and _move in migrate_pages(), the TLB flushing can be batched easily with the existing TLB flush batching mechanism. This patch implements that. We use the following test case to test the patch. On a 2-socket Intel server, - Run pmbench memory accessing benchmark - Run `migratepages` to migrate pages of pmbench between node 0 and node 1 back and forth. With the patch, the TLB flushing IPI reduces 99.1% during the test and the number of pages migrated successfully per second increases 291.7%. Signed-off-by: "Huang, Ying" Cc: Zi Yan Cc: Yang Shi Cc: Baolin Wang Cc: Oscar Salvador Cc: Matthew Wilcox Cc: Bharata B Rao Cc: Alistair Popple Cc: haoxin --- mm/migrate.c | 4 +++- mm/rmap.c | 20 +++++++++++++++++--- 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/mm/migrate.c b/mm/migrate.c index 70a40b8fee1f..d7413164e748 100644 --- a/mm/migrate.c +++ b/mm/migrate.c @@ -1215,7 +1215,7 @@ static int migrate_folio_unmap(new_page_t get_new_page, free_page_t put_new_page /* Establish migration ptes */ VM_BUG_ON_FOLIO(folio_test_anon(src) && !folio_test_ksm(src) && !anon_vma, src); - try_to_migrate(src, 0); + try_to_migrate(src, TTU_BATCH_FLUSH); page_was_mapped = 1; } @@ -1732,6 +1732,8 @@ static int migrate_pages_batch(struct list_head *from, new_page_t get_new_page, stats->nr_thp_failed += thp_retry; stats->nr_failed_pages += nr_retry_pages; move: + try_to_unmap_flush(); + retry = 1; for (pass = 0; pass < 10 && (retry || large_retry); pass++) { retry = 0; diff --git a/mm/rmap.c b/mm/rmap.c index b616870a09be..2e125f3e462e 100644 --- a/mm/rmap.c +++ b/mm/rmap.c @@ -1976,7 +1976,21 @@ static bool try_to_migrate_one(struct folio *folio, struct vm_area_struct *vma, } else { flush_cache_page(vma, address, pte_pfn(*pvmw.pte)); /* Nuke the page table entry. */ - pteval = ptep_clear_flush(vma, address, pvmw.pte); + if (should_defer_flush(mm, flags)) { + /* + * We clear the PTE but do not flush so potentially + * a remote CPU could still be writing to the folio. + * If the entry was previously clean then the + * architecture must guarantee that a clear->dirty + * transition on a cached TLB entry is written through + * and traps if the PTE is unmapped. + */ + pteval = ptep_get_and_clear(mm, address, pvmw.pte); + + set_tlb_ubc_flush_pending(mm, pte_dirty(pteval)); + } else { + pteval = ptep_clear_flush(vma, address, pvmw.pte); + } } /* Set the dirty flag on the folio now the pte is gone. */ @@ -2148,10 +2162,10 @@ void try_to_migrate(struct folio *folio, enum ttu_flags flags) /* * Migration always ignores mlock and only supports TTU_RMAP_LOCKED and - * TTU_SPLIT_HUGE_PMD and TTU_SYNC flags. + * TTU_SPLIT_HUGE_PMD, TTU_SYNC, and TTU_BATCH_FLUSH flags. */ if (WARN_ON_ONCE(flags & ~(TTU_RMAP_LOCKED | TTU_SPLIT_HUGE_PMD | - TTU_SYNC))) + TTU_SYNC | TTU_BATCH_FLUSH))) return; if (folio_is_zone_device(folio) &&