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bh=b/06ZIkmccm+2w2sDb3OOn+m3OxExo5G5C0UlpBP/5Y=; b=K25BflN2u0RMpFsXTdqj/qar/MOLc3KnoJWsm4ebL9FPAWOJucD07Cu0 TfkttA0fBOATYFPGF+HejBH+AA6ZpM2y/9E9L/ZE2WFBF1+QefYJG2yGD j94rxiyU5MgcssY/JXbhskNszTKmtQsAa5zusTcZ6JyrDUfj5i/lG9YOW Umv61/P5B5aP2VpNQMaTD4oUeZpDCspJCHnLD3DN76Ear8W8Z+SMP7O/V gAZvlj27Dybc4rxl0U3+bj1qhvNx5jCivujU6Umjt6f6TNnikuET91IGu YvsDVE39KZPEJnsAq0v6dnoxTXJBLHdzO4/VZnVDrCfVxElZHOSxZH1fB w==; X-IronPort-AV: E=McAfee;i="6500,9779,10612"; a="330432774" X-IronPort-AV: E=Sophos;i="5.97,276,1669104000"; d="scan'208";a="330432774" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2023 22:34:11 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10612"; a="659744793" X-IronPort-AV: E=Sophos;i="5.97,276,1669104000"; d="scan'208";a="659744793" Received: from baoyumen-mobl.ccr.corp.intel.com (HELO yhuang6-mobl2.smartont.net) ([10.255.30.227]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2023 22:34:05 -0800 From: Huang Ying To: Andrew Morton Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org, Huang Ying , Zi Yan , Yang Shi , Baolin Wang , Oscar Salvador , Matthew Wilcox , Bharata B Rao , Alistair Popple , haoxin , Minchan Kim , Mike Kravetz , Hyeonggon Yoo <42.hyeyoo@gmail.com> Subject: [PATCH -v4 8/9] migrate_pages: batch flushing TLB Date: Mon, 6 Feb 2023 14:33:12 +0800 Message-Id: <20230206063313.635011-9-ying.huang@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230206063313.635011-1-ying.huang@intel.com> References: <20230206063313.635011-1-ying.huang@intel.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: A3F5440005 X-Rspamd-Server: rspam09 X-Rspam-User: X-Stat-Signature: kdbm9p8wk6mb4n7uyckmk3bgas64mdnb X-HE-Tag: 1675665251-814808 X-HE-Meta: U2FsdGVkX19NnAS5SRf/kT2DzuUIe6PQzBRpaHCZvIrlS7WAkUaTwy8Pwv4Nh40OlG+bKCk82N3KG37Z5inNe2wy1KJmkSlIyEWQhdobx1RE08LmivYGESTYa9ZG7sa7sghcjW+3/pNhegzetukvMcOcZk9rZUyJJIUuUSCpHeRLGDqmwfvpbw8NF7AwKyyJNB/uHN9c8RTansIEkPHW9YfTUhDUj1vtRJRlNN4p1MzH/kVQA2BmoC9xNFnwSNj33OtsShSIRq+5ayEt6LXGCy+8ZbX8x4ZVXIjfM16rQor6ktrjd2s27A6l1ia2vp3HgiBPrxBL1ooVmO/uPUHIXgfR6L2MgmIwVL5eM3cVgGWjRN8LQSyNaWsAi+rCaMnj83D1uu2Cl3MXfZzZ5OOOy9UJAbooGe5Kj3KaQPCllKiBZcp0BvWX/zdcqexDgTIoxSd4uQwOcrfrHn3H6tWbzspBuQ/GWUtwjha5NRS11GavLK+ZhS3OlI0WWVK46cddRWWroFOe2UEuSivyCUc3l3pM/skHtI7+vtzgPT2ki4/Tk45eHJsTAhTbqUKZFkQUBcnIiTXO1XkCoBZHSjcG/CCJyboj0b7m9a3UceSaKC4TBJFJX0lb+rpoPVwDVY3RY0GnRjJZQPhEJ3F+a9PKgWWhsBUGifgWEmyVxPRjwa4IktPo68qDx7w6NP5ONA3NKknFUuan2TSHWCxCuL8AhA7txO5r/2UW99xTOHwQJcfKnCEC//tzEraUq97q88o4UOQzq9Vzsp2LIn2yHK4om3J+iSDhyjmEIPm+EZdCaO+y2UmZ1rGpuT9vcHdsrMt7Z6tEknkO+ZgcpxMjlB0RpkWAGGj5HoF4Bl3xqnX81k1WRXcm4bFJ2ZEExrZVE4QYdNZTQZoDjW6LaZKss/8Nde7yCwTMAWCAhjeFiRffMblijHKuNVsnm31fXWTB1SdmO36Dw6DynVbuqXTubDt Dg863uf8 vMUgddqDa62dlUcYDtF5kSIgTCc+GZRkiRectO1+7mmoMngodFhmKvZ6HR61eMnKXgmZk+kg2pgJn6pHvEBJ4lujz4WuaBHBFO4OVKpjMJ+FGdvJ98iN8KLbynnOHkiXMWUulPwYrMPu8YSLytozlte9jWiztfhtqtWnZxMHzjlGEA/OMX5CKuPZ3FqPk0VcMIAfNN4WU0aTxQq/52RDuaEP0ZxFEGGZolgkjFLxWfvBIrunA+valgf9gM0A4pbUayOq+wkKKdZQ4syoTKb/8rUI4CfEcXNcRUZBRGsFOCrm4Eu28LEHAPU88bqzP0SdW8L75+b5ZHXLRLPPTZKPy5aR6z9TsgIzdxim+d50/FB41+Xa6EB43SuyKzLbYL9MT5KDfu6bi6Br9CblXI2dLS/3l4ApEe1A9WZeP+/mLxfWuueGKHonnUBxFdPd4Q82zNJQGqQ4u+lnli6pOIDuwI559SfI+5RDViZgc9LziuogrJ421wraVJq1WkGJPys5mXKydOU0OSieTqiSTv1inmayNeENWfOLcXl6LRfMQUf165kJJwOklG2fUAJD52xAib3LRY6XyGD/Wk1FT9hU3sJkHkajSpKzajPjnnswwrd/69IHsBFychkp2BLtiUkod1QlXT/vdiqKD2E7pXJcY0jpi5Q== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: The TLB flushing will cost quite some CPU cycles during the folio migration in some situations. For example, when migrate a folio of a process with multiple active threads that run on multiple CPUs. After batching the _unmap and _move in migrate_pages(), the TLB flushing can be batched easily with the existing TLB flush batching mechanism. This patch implements that. We use the following test case to test the patch. On a 2-socket Intel server, - Run pmbench memory accessing benchmark - Run `migratepages` to migrate pages of pmbench between node 0 and node 1 back and forth. With the patch, the TLB flushing IPI reduces 99.1% during the test and the number of pages migrated successfully per second increases 291.7%. NOTE: TLB flushing is batched only for normal folios, not for THP folios. Because the overhead of TLB flushing for THP folios is much lower than that for normal folios (about 1/512 on x86 platform). Signed-off-by: "Huang, Ying" Cc: Zi Yan Cc: Yang Shi Cc: Baolin Wang Cc: Oscar Salvador Cc: Matthew Wilcox Cc: Bharata B Rao Cc: Alistair Popple Cc: haoxin Cc: Minchan Kim Cc: Mike Kravetz Cc: Hyeonggon Yoo <42.hyeyoo@gmail.com> --- mm/migrate.c | 4 +++- mm/rmap.c | 20 +++++++++++++++++--- 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/mm/migrate.c b/mm/migrate.c index 9378fa2ad4a5..ca6e2ff02a09 100644 --- a/mm/migrate.c +++ b/mm/migrate.c @@ -1230,7 +1230,7 @@ static int migrate_folio_unmap(new_page_t get_new_page, free_page_t put_new_page /* Establish migration ptes */ VM_BUG_ON_FOLIO(folio_test_anon(src) && !folio_test_ksm(src) && !anon_vma, src); - try_to_migrate(src, 0); + try_to_migrate(src, TTU_BATCH_FLUSH); page_was_mapped = 1; } @@ -1781,6 +1781,8 @@ static int migrate_pages_batch(struct list_head *from, new_page_t get_new_page, stats->nr_thp_failed += thp_retry; stats->nr_failed_pages += nr_retry_pages; move: + try_to_unmap_flush(); + retry = 1; for (pass = 0; pass < NR_MAX_MIGRATE_PAGES_RETRY && (retry || large_retry); diff --git a/mm/rmap.c b/mm/rmap.c index b616870a09be..2e125f3e462e 100644 --- a/mm/rmap.c +++ b/mm/rmap.c @@ -1976,7 +1976,21 @@ static bool try_to_migrate_one(struct folio *folio, struct vm_area_struct *vma, } else { flush_cache_page(vma, address, pte_pfn(*pvmw.pte)); /* Nuke the page table entry. */ - pteval = ptep_clear_flush(vma, address, pvmw.pte); + if (should_defer_flush(mm, flags)) { + /* + * We clear the PTE but do not flush so potentially + * a remote CPU could still be writing to the folio. + * If the entry was previously clean then the + * architecture must guarantee that a clear->dirty + * transition on a cached TLB entry is written through + * and traps if the PTE is unmapped. + */ + pteval = ptep_get_and_clear(mm, address, pvmw.pte); + + set_tlb_ubc_flush_pending(mm, pte_dirty(pteval)); + } else { + pteval = ptep_clear_flush(vma, address, pvmw.pte); + } } /* Set the dirty flag on the folio now the pte is gone. */ @@ -2148,10 +2162,10 @@ void try_to_migrate(struct folio *folio, enum ttu_flags flags) /* * Migration always ignores mlock and only supports TTU_RMAP_LOCKED and - * TTU_SPLIT_HUGE_PMD and TTU_SYNC flags. + * TTU_SPLIT_HUGE_PMD, TTU_SYNC, and TTU_BATCH_FLUSH flags. */ if (WARN_ON_ONCE(flags & ~(TTU_RMAP_LOCKED | TTU_SPLIT_HUGE_PMD | - TTU_SYNC))) + TTU_SYNC | TTU_BATCH_FLUSH))) return; if (folio_is_zone_device(folio) &&