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Thu, 22 Jun 2023 07:42:53 -0700 (PDT) From: Ryan Roberts To: Catalin Marinas , Will Deacon , Ard Biesheuvel , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Andrey Ryabinin , Alexander Potapenko , Andrey Konovalov , Dmitry Vyukov , Vincenzo Frascino , Andrew Morton , Anshuman Khandual , Matthew Wilcox , Yu Zhao , Mark Rutland Cc: Ryan Roberts , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: [PATCH v1 10/14] arm64/mm: Split __flush_tlb_range() to elide trailing DSB Date: Thu, 22 Jun 2023 15:42:05 +0100 Message-Id: <20230622144210.2623299-11-ryan.roberts@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230622144210.2623299-1-ryan.roberts@arm.com> References: <20230622144210.2623299-1-ryan.roberts@arm.com> MIME-Version: 1.0 X-Rspamd-Server: rspam08 X-Rspamd-Queue-Id: 12EA112001F X-Stat-Signature: j4fw4egcy7qqjbhykxzw8gip6ycsc54k X-Rspam-User: X-HE-Tag: 1687444976-408846 X-HE-Meta: U2FsdGVkX18I9TgbQZ2VezJZhMylEDpkLpWDmR6VqBhkZisgIJ+DYGx9HC5pGwnfQ9EPMSoo0kXM6v2r0b0NX3j+UHUpq2AxOxXaRtrd11eWV6kZaQhUraQvWp+BzBdHMQmh/YIjimWC4Flbp54+87eb8sTiDerxA6qr8Li9nsKw0T5Am6MS6yv2B86hECIhgGWkrd61qNUpc2mchH9/HJM0XCjXCGiWHIGpCTrOU3sPBpY+nZO9BH4QXI78GyDvZL3F5xyDza/gtp1apOmRb55cVX443BMvOguFddIfZSVnp486MBJEvT4zAGGvSbqcMK4N4spgW/NKMvqyypgKHXQRXLtT7DniXWk5EYalmiZ9CwQi7E8Hpu0MFCtR1jFsddHEaGmHcDKJeYFh6kRxNmRHPfhwyrg1Q5y2/JIaflq6eToN2NSZhtylIXwEEdE+NiYvXj3iL42T86FJGnmQP/7JiyS/ORc0WW2g68Prg3Y7cyIPOlAE0kzvEL845qv2pRaGxT7a4UuqgfLXyqL1O81vCTzD5xCWhk6yJlWA9s7Eh4vcmxM9dxammWajXw2Hn2jaztkiCPtZ2druXucSqeLlujGAHyqLf8kkhiIHRvjhGDDX0yttyCc/7WRw0PpnUxJIODx90ARp83IrkGnKGY2QKcONqEMYIdV2rWeeVLzH+egha9K7oA8bseCZlsjj2CXndkxLPDj/uDbSskVG0v5fya1d/H8qA8nOpKj2uWe875cRL1YRFNcg/wZaM3qg+GJtsRJz7VcaW+juGEznrYt0WnqPWzX26Zb3H9nLGoJTuG9MXrrjMAXdY35c3vmmgmu6JHJ3bmSxuD7VB9Dt4tixJ2wOZqG0biwMTPrc2ydfb98j7sKLgkrRueMLPPdOBl7Hql83zcGeWaLWslYhmT/8qnKmY/DprSNbXhhuKpwBdDuZUbDvlXrY6W//oLI94wdvE7KTOIPNllVfK++ nc+7zmPi nIo+U6L7KtxD5cQWdfNPVIPyWeF9BwyfeYib8en+YMEv+6Bc6cyLzrdprkBnYmDHUo1HLuYH1+HpR4AvHyFYHE6Hw7JB8Vuzn4hxzfzZssFA7u7Sp5Do+8PMzQlP3DLs9wuYqJqqYULVswQ/NG7OL/oEgjVQ8dnR+nn40lBGFYsEONGuRNJ7O/qM42FMXvQAZiZrtrSRTUxiyFpkWr/wYVMny9khevcM7gcktldrZD1cmVbW/bW/+qclWqkVqdnx9wmH5j/wicSWh/bOV6Ab9BypYyA== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Split __flush_tlb_range() into __flush_tlb_range_nosync() + __flush_tlb_range(), in the same way as the existing flush_tlb_page() arrangement. This allows calling __flush_tlb_range_nosync() to elide the trailing DSB. Forthcoming "contpte" code will take advantage of this when clearing the young bit from a contiguous range of ptes. Signed-off-by: Ryan Roberts --- arch/arm64/include/asm/tlbflush.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index 412a3b9a3c25..de1f5d9a546e 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -278,7 +278,7 @@ static inline void flush_tlb_page(struct vm_area_struct *vma, */ #define MAX_TLBI_OPS PTRS_PER_PTE -static inline void __flush_tlb_range(struct vm_area_struct *vma, +static inline void __flush_tlb_range_nosync(struct vm_area_struct *vma, unsigned long start, unsigned long end, unsigned long stride, bool last_level, int tlb_level) @@ -357,6 +357,15 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma, } scale++; } +} + +static inline void __flush_tlb_range(struct vm_area_struct *vma, + unsigned long start, unsigned long end, + unsigned long stride, bool last_level, + int tlb_level) +{ + __flush_tlb_range_nosync(vma, start, end, stride, + last_level, tlb_level); dsb(ish); }