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bh=5z4wJk0QTIjcx4c+UwHHBLj4skJRBt0v1N12u1MFfd4=; b=F3tIJGX3TcBd8jd37iFsFAx744 +Fg9zd01Ea63D7FffjdtHbZRmLMH1r81WylBxdustZ4JMXuUPwnYFR5pQFHmn37M9chwOI5Pcu4eV z11VZwus4IF3NTVCNup0zOEIFRPGlw0XRw/l5MD2SZmt+siplZn9psDbOO87IIHk/6sO73zwp3nQY OHpBuoINn3jHnlqe03bIALGblwIkdlqvgd4zp8aS1BcTvc/dXJo5oJJsqWZRgxk8R/PFVxTH12lQF adwHKSxlkTGhzuIZXvRjXm7rYoNngmHOVMlkoNJq7NJeEtLW8kHl5JAmoqabG3GVaRnwtiIKV0syu Ki84JZwA==; Received: from willy by casper.infradead.org with local (Exim 4.94.2 #2 (Red Hat Linux)) id 1qIxjS-00EupL-Ve; Mon, 10 Jul 2023 20:43:43 +0000 From: "Matthew Wilcox (Oracle)" To: Andrew Morton Cc: "Matthew Wilcox (Oracle)" , linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, Mike Rapoport , Michal Simek Subject: [PATCH v5 16/38] microblaze: Implement the new page table range API Date: Mon, 10 Jul 2023 21:43:17 +0100 Message-Id: <20230710204339.3554919-17-willy@infradead.org> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230710204339.3554919-1-willy@infradead.org> References: <20230710204339.3554919-1-willy@infradead.org> MIME-Version: 1.0 X-Stat-Signature: xb5k888p7j7ang3nezkfqpuw4jremwrf X-Rspamd-Server: rspam10 X-Rspamd-Queue-Id: 6464912000E X-Rspam-User: X-HE-Tag: 1689021831-617733 X-HE-Meta: U2FsdGVkX1+nqfg0h6p1GRWSHN1QhRYZ+2FrJg62J6Cb1erMdqqmT1lKykCL4oUkzZ2pIeFJBvW/kiClKc/0so9s33ini4KvmeYueu499e5EfsCYaTxHo2Zx3eyF3DSswGKzh97zwmz8DWuSD8TYa8rZFXU6eb4t0DKTCBnONmSUzB7ThgUQPLW5o5uU9rPc2l2zDWlY3SWPXfDfD9BbIXx9JBZyu4v7Y3WeLdbelDlpu25O87t+mdSFlNm1YXg8aZJl0dsgXbVY0mk6zAMwGsdmCVKXzHAXCXKfQTB2Y+prr69RdvUyuL5fCZWz2GfH8P9moT4GZ/H97FkDTSr8HGJM5mb0LEjoifXuqsBWI1MOzNYS/hT9D1MUpLtuwMX1I8b6wMsBdKtSN1g+m5MXjloj43CFgTURAkHofeaIVPKHo7ljqA60QWxMONzhRzXyMsoryBtTdptSDVCFrem3f9ixywnZxgw+7jTHkE6KqLia1HdIGyJqgc2ktSTpxEP+WVa+2GUPK9EN2g/0Urbqc6878J/GK+K1BzbWJq87xorRKuZHmUeguHzPkbbnRdptmpUIb4BSINRXGJT86SJGxAIQ2XWrpEFNXCJSiLxhTiSq/nxkltDbhYVC82vUu8/esbXrBY0zoXdLUTliaerftm1ypWLJTMoEqcIrE0Agv4lp6DNlWTxU//RXsavKBgCrEW8JuBZN9kuUnrXcxBSAX6I0Po7MQiIYXK69S9A8k+cKtaVPhOXaprzKnbNG0nI0d2b6on5qBqjOKEFDxniWiQIKBQsz4LthGueDUNBTZJQ+YM0IS69iYYgd8IFuLZEX7TkkGbrYzYQPlsxGfMCB4wm4x8okJDz7k0+aPUuG/8Ne4FHCYdQKJw+OqFY6Mqx2/hDTSJw6gVAW7nHgXtvPOXS1rK6zxJKMEHKT86xOabhFHIwVULqiOgJ9iXUj1nH4wrOl9cNWTneI6Y+PE8g ixOTFyn5 Q/MbfVSbqpblJUjJp8+wmYmN2/HAMteycqngJ0pOb2yOnAg/Qo3WIX+iklm4KXRzeLy/qE5WokzCxywrjHteB5DLug9P/GSfiBIvdSsDzuNw7+g4CEJgxvJ1Qtt+dLNolSQrOJN2D9l/OvZ1pCtqSDUDtEXGhrkbJEZaHLKL/UcyzTcNFjPdqG3XESRTVcDicucATRRGtPS1V6wCloQCPg6u6pX0zFbadhiv/zhYbLkrOky7J21Ipu2PYVKxh32XsxTnX6ZdMNZIs4ytm8pvFvS1+3STboudkDVkXXweyFzjma9s= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Rename PFN_SHIFT_OFFSET to PTE_PFN_SHIFT. Change the calling convention for set_pte() to be the same as other architectures. Add update_mmu_cache_range(), flush_icache_pages() and flush_dcache_folio(). Signed-off-by: Matthew Wilcox (Oracle) Acked-by: Mike Rapoport (IBM) Cc: Michal Simek --- arch/microblaze/include/asm/cacheflush.h | 8 ++++++++ arch/microblaze/include/asm/pgtable.h | 15 ++++----------- arch/microblaze/include/asm/tlbflush.h | 4 +++- 3 files changed, 15 insertions(+), 12 deletions(-) diff --git a/arch/microblaze/include/asm/cacheflush.h b/arch/microblaze/include/asm/cacheflush.h index 39f8fb6768d8..e6641ff98cb3 100644 --- a/arch/microblaze/include/asm/cacheflush.h +++ b/arch/microblaze/include/asm/cacheflush.h @@ -74,6 +74,14 @@ do { \ flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \ } while (0); +static void flush_dcache_folio(struct folio *folio) +{ + unsigned long addr = folio_pfn(folio) << PAGE_SHIFT; + + flush_dcache_range(addr, addr + folio_size(folio)); +} +#define flush_dcache_folio flush_dcache_folio + #define flush_cache_page(vma, vmaddr, pfn) \ flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE); diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h index d1b8272abcd9..6f9b99082518 100644 --- a/arch/microblaze/include/asm/pgtable.h +++ b/arch/microblaze/include/asm/pgtable.h @@ -230,12 +230,12 @@ extern unsigned long empty_zero_page[1024]; #define pte_page(x) (mem_map + (unsigned long) \ ((pte_val(x) - memory_start) >> PAGE_SHIFT)) -#define PFN_SHIFT_OFFSET (PAGE_SHIFT) +#define PFN_PTE_SHIFT PAGE_SHIFT -#define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET) +#define pte_pfn(x) (pte_val(x) >> PFN_PTE_SHIFT) #define pfn_pte(pfn, prot) \ - __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) | pgprot_val(prot)) + __pte(((pte_basic_t)(pfn) << PFN_PTE_SHIFT) | pgprot_val(prot)) #ifndef __ASSEMBLY__ /* @@ -330,14 +330,7 @@ static inline unsigned long pte_update(pte_t *p, unsigned long clr, /* * set_pte stores a linux PTE into the linux page table. */ -static inline void set_pte(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte) -{ - *ptep = pte; -} - -static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte) +static inline void set_pte(pte_t *ptep, pte_t pte) { *ptep = pte; } diff --git a/arch/microblaze/include/asm/tlbflush.h b/arch/microblaze/include/asm/tlbflush.h index 2038168ed128..a31ae9d44083 100644 --- a/arch/microblaze/include/asm/tlbflush.h +++ b/arch/microblaze/include/asm/tlbflush.h @@ -33,7 +33,9 @@ static inline void local_flush_tlb_range(struct vm_area_struct *vma, #define flush_tlb_kernel_range(start, end) do { } while (0) -#define update_mmu_cache(vma, addr, ptep) do { } while (0) +#define update_mmu_cache_range(vmf, vma, addr, ptep, nr) do { } while (0) +#define update_mmu_cache(vma, addr, pte) \ + update_mmu_cache_range(NULL, vma, addr, ptep, 1) #define flush_tlb_all local_flush_tlb_all #define flush_tlb_mm local_flush_tlb_mm