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Edgecombe" , Deepak Gupta , Ard Biesheuvel , Szabolcs Nagy Cc: "H.J. Lu" , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Brown X-Mailer: b4 0.13-dev-099c9 X-Developer-Signature: v=1; a=openpgp-sha256; l=2577; i=broonie@kernel.org; h=from:subject:message-id; bh=sadX6jRs7DdBAThhpdGK2D3phr2V3dLQCMXle4b8GlY=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBktGaUN4aeaAwCFkHQflmt2PAnyRNXHtw45Ywz6qxG Xab0kZeJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZLRmlAAKCRAk1otyXVSH0BL2B/ 9k5JaZ3viuyrN8msxXAcCE/j7Koesget2VB5E9ovny/d0xhQf2MogVf7/QvYRD9OA/+TfA7lYCEt/A 4aO8Cq2y75rdhJuvFGZwumZPFCnWc5ZKJFGcfsgd4Vf8P/2LIMeNLleBrub3YbxT8svakkp4ty2ZVl +xdMETvjbnSIL+gAtd8JWzrJJPxW8pXhdhHtu9FTBEEaUUW24+yl73iyczpCe+0Ikezyl+uFUcFJJc R1Cl80dOZD87l9pyRbKGpfdOBrlodw/y5gO+kascJmdAkpz8yqOCS8afTERsLU1GMkSF6SYrGweBjK ADoQZ6GrMvuvaX4xnAlSxn3W8iLLwx X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-Rspam-User: X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: A7707140009 X-Stat-Signature: dpubdwut4xkj9w87gapp8gsc6y6k8mkc X-HE-Tag: 1689544414-199322 X-HE-Meta: U2FsdGVkX1/xf7lxfK+Qu+xFJMsB/U+rgTOQGLiXuxWD45ctZEy17P3OjAnrpi8MWduiRcZKuo9sokM54AvCeBqgoSazlLRcQMpjtOV6VIZFOwO9Kzmknr8Zj9AaInC07mE1QZSvl6183Z5TL+/Dt0AsMTDcqQGe80oyLWK9qVJap3sN6850ZLKUbmPHXuG7mD5bhAGQ1kbdCSjoSLU2veHaN+yGKhs3PRcA4Py0ZXdWvEc4UottABqFca0J5H5YxxahAIIGyCg0Juk/EO1fUpghsgBCc/9krsO42C8qevVkH1Qgc9GC2CN9z3C2DvBheymhvx2i2Ch9l7eRv/mLuiQnaPgVi078PE22xveNpLVMjse/Nnl6hUrXmCVdrcHSkaaeVCFiVFDTbXl/PxbRXBvFrHD65gvdM86ZogFSAQ0XoVCysUWwMzdSXxru43cLT7uvB1ss9x9h1ES/kj/yyW8b0qYycGKLSikS2m8pFhyR533gLNpGB5eqqMs2yGmLp3++AhVq2xuNznDGC36pL4WSBELoO86q3u7f7j/0Tmw5xFBkHQBAxR9EnrbGYzUob0oGmMRAE4z/mCTrbbqhXtYw145npgrrASpYhwOucsKq/PcvxZ50Hp/m4f2GFeTxqV7jdytf3346UKQqxVa6JszAcUaNt1W8DzMyyv0PZzMKzvMBiDxUODuDEjEzNrbubCg7TvDTiqP31UF7lCsn04stgMZa8iOb9A5+tizNeWOrWFp2QF4r1hOWANNEGs3gOtdyKuJQpa6PIRUT+kh2lDzLjDS8lsGbmjDD8VPdghD2XDrYksMcrGYswlDBGphP7fnQOwKSDnq/8oPgz2X27rS95H0uh20C2TiTRzQvj4sFpjEi77UMqADjnv7OY93EYRB+Xc8+OTGPg0cxYAY4eIoNj7m2zrvuTpmRJ0C9UpiF7xfw/UrFQiWT9ICP5Fc6XTkpw+NBy1YVOXlFYLw 3dkkR9r1 VuIz3XOrXaWnuInAqfAKlp/jKxOfLh1M1CHugeQemojJVI174j2JUsxi0T73ihn2d97p5MxUcmjh3DMSFmSVlB/U2XT2jWel8LD7bWdzMPGhSZ0ft+8nUQunItwbSWdNRDqJnUP/esKYVl+Me00fjSCEtHBd/jkivPQ/G2T/pw+NIPqg5le6kW3p0srLgd+HwOGvRyf8JuV+lCcLlplrs3m8TAOQYDwLOEgIEv4PJTLEGilW9ZbuS5pzbCn+so72aDhxUgZK8E1tsCx0FxWkYkZVKugddsUMy6JAngGCR+H74WRhsK3rwhl55j7+3s531uT46v7tcSaFe3cYRWOgo/PhAistPJkKU2hhdxdVY6CLp7S8Tzm6VIFgo7cCSQtDwbAf5TtZ+BUlAjG90qLw8bCSLVm6OfTziKRSV6rhvSyfg8CQ= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Define C callable functions for GCS instructions used by the kernel. In order to avoid ambitious toolchain requirements for GCS support these are manually encoded, this means we have fixed register numbers which will be a bit limiting for the compiler but none of these should be used in sufficiently fast paths for this to be a problem. Note that GCSSTTR is used to store to EL0. Signed-off-by: Mark Brown --- arch/arm64/include/asm/gcs.h | 51 ++++++++++++++++++++++++++++++++++++++++ arch/arm64/include/asm/uaccess.h | 22 +++++++++++++++++ 2 files changed, 73 insertions(+) diff --git a/arch/arm64/include/asm/gcs.h b/arch/arm64/include/asm/gcs.h new file mode 100644 index 000000000000..7c5e95218db6 --- /dev/null +++ b/arch/arm64/include/asm/gcs.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2023 ARM Ltd. + */ +#ifndef __ASM_GCS_H +#define __ASM_GCS_H + +#include +#include + +static inline void gcsb_dsync(void) +{ + asm volatile(".inst 0xd503227f" : : : "memory"); +} + +static inline void gcsstr(u64 *addr, u64 val) +{ + register u64 *_addr __asm__ ("x0") = addr; + register long _val __asm__ ("x1") = val; + + /* GCSSTTR x1, x0 */ + asm volatile( + ".inst 0xd91f1c01\n" + : + : "rZ" (_val), "r" (_addr) + : "memory"); +} + +static inline void gcsss1(u64 Xt) +{ + asm volatile ( + "sys #3, C7, C7, #2, %0\n" + : + : "rZ" (Xt) + : "memory"); +} + +static inline u64 gcsss2(void) +{ + u64 Xt; + + asm volatile( + "SYSL %0, #3, C7, C7, #3\n" + : "=r" (Xt) + : + : "memory"); + + return Xt; +} + +#endif diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h index 14be5000c5a0..22e10e79f56a 100644 --- a/arch/arm64/include/asm/uaccess.h +++ b/arch/arm64/include/asm/uaccess.h @@ -425,4 +425,26 @@ static inline size_t probe_subpage_writeable(const char __user *uaddr, #endif /* CONFIG_ARCH_HAS_SUBPAGE_FAULTS */ +#ifdef CONFIG_ARM64_GCS + +static inline int gcssttr(unsigned long __user *addr, unsigned long val) +{ + register unsigned long __user *_addr __asm__ ("x0") = addr; + register unsigned long _val __asm__ ("x1") = val; + int err = 0; + + /* GCSSTTR x1, x0 */ + asm volatile( + "1: .inst 0xd91f1c01\n" + "2: \n" + _ASM_EXTABLE_UACCESS_ERR(1b, 2b, %w0) + : "+r" (err) + : "rZ" (_val), "r" (_addr) + : "memory"); + + return err; +} + +#endif /* CONFIG_ARM64_GCS */ + #endif /* __ASM_UACCESS_H */