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Wed, 09 Aug 2023 16:24:22 -0700 (PDT) Received: from charlie.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id l18-20020a170902d35200b001b54d064a4bsm82765plk.259.2023.08.09.16.24.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Aug 2023 16:24:22 -0700 (PDT) From: Charlie Jenkins To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: charlie@rivosinc.com, conor@kernel.org, paul.walmsley@sifive.com, palmer@rivosinc.com, aou@eecs.berkeley.edu, anup@brainfault.org, konstantin@linuxfoundation.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-mm@kvack.org, mick@ics.forth.gr, jrtc27@jrtc27.com, rdunlap@infradead.org, alexghiti@rivosinc.com Subject: [PATCH v10 1/4] RISC-V: mm: Restrict address space for sv39,sv48,sv57 Date: Wed, 9 Aug 2023 16:22:01 -0700 Message-ID: <20230809232218.849726-2-charlie@rivosinc.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230809232218.849726-1-charlie@rivosinc.com> References: <20230809232218.849726-1-charlie@rivosinc.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: C257BC0027 X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: gqiw1un6b9z5nwumhqp3qq44bw8soghj X-HE-Tag: 1691623463-25827 X-HE-Meta: U2FsdGVkX1/E+PHKG76GEvZU4j58h6ngDxSv/i1ytGRo68qZBs6BIzBwn3W9jYsRw2JGej2CnXfVTX017dO6BF2JhsedExGOpnDf1h8nI2sUUSI1hdgOz5JfUF8mmtsbO3i4qkw1puXRR9njTVhbhG3/bXQPOwXeSlBbZIVloVIR7WWTQkc1fewsTX0+E6OvYCHTE90wCEX4Ng38EJwlTd5uK7BVzYp+muhdMUHFpss+QYS8+jQ/MFnsPPhl8ZsrbZUF1WUukQ8QPNHVWcKDkWcub9KR2wjhvJkBhj76O6b8faHP+XR+64p37CLR84/DtuphDc1okm8A7uFwNN76bywb70hLYAg8s0nFsmNItKc7wRDpHflnVkK3aC6F/Y24175sCEv02s3FnUaeQCvJJoG9EsxdFH9HHqIFiXkWyK50cBYpB4ov+o6bzWUlmMv8y+Cq1AM0lZn7QJgfCkP0VB4+PcacwH9tOmbL4pJj+EZxuSIrR+U03Td6074uor5L3IsERL+uygNZZj7HJ7vQs3almFKSN33h8U2g9FPXHM+WdbOZEQPa1IOqygGi4DEcdHNbgfzuEuefuz9NPRKoUI96D3CnL6tL1qAQqxyQ4x59tkMDPneS2eV027O9W+WTKFU4SBWAYkM7TXtic+90jlRosjagzPZJHbKUYQeXuu72FTI1iv800Y7AEnytLFY6ZrnIipQUPIecf1EHb3EjLlx3JW93sI1DoEisVlW0Xrn3Ic/cUsWbWwBo2q3IBH9UjIf29rklH5SARGPVjGRLAD1b8lZLWIEN6CpXBFbER9+DUJN3/vb6nfBArR7nqw9+CHZH96ACg1MtG7xUljAHOVvnCmcQSzYGlBufmZqzU+pcG7viw1TNiugHnYzRgZLGeH2+zd8Zn0nEGT+3Atl5EvbWC6ca7eHY+1B4FK99FocNvBzQXk1hJv8gfOmDuI/wVhuc2BcglefvXpkcRzq Q/eIio8s GHDFSOTtSvW1jR3h8gHv7x1EuxlNcCbtJmgmKCzMy/5CoY0mdfC/tyqrSnJiS0B+/pJaoi51nb5b/Y0iLF6mjmIAv8DKM5Yl0d4Amq/PlPzRM033cDe27nyM9sEgbRVZ14j/aXijBpXgyhpkqIJmMuBimUi1aZy3kHH9RHSFHLioWR9iULcRlV1yb8O++YQZAtdNmVA/pObgW3VzabEiaBqCZzxhf2DOyW/oTsf91xZ8QXuJiLZNB5S/bzT5R68AaJmKmX/UiPkAqWBxyj3+/fVJ0govIsaDCPRoynw3UIjaQElaLsjLDUWxzjQ7FCSmv3oYXw7soJHuaFK7dV4w+raXSn411Ud7DuOmE2x4Vx0JaonioyM69a+3M7n1NWLcNlAMFv7KgqPX2UBYpc2FEfXx9rbuGtWHKeWUArtbskNyhTkRDXHfaXBAmIyRV/rFBvtih X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Make sv48 the default address space for mmap as some applications currently depend on this assumption. A hint address passed to mmap will cause the largest address space that fits entirely into the hint to be used. If the hint is less than or equal to 1<<38, an sv39 address will be used. An exception is that if the hint address is 0, then a sv48 address will be used. After an address space is completely full, the next smallest address space will be used. Signed-off-by: Charlie Jenkins --- arch/riscv/include/asm/elf.h | 2 +- arch/riscv/include/asm/pgtable.h | 25 ++++++++++++-- arch/riscv/include/asm/processor.h | 52 ++++++++++++++++++++++++++---- 3 files changed, 70 insertions(+), 9 deletions(-) diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index c24280774caf..5d3368d5585c 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -49,7 +49,7 @@ extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); * the loader. We need to make sure that it is out of the way of the program * that it will "exec", and that there is sufficient room for the brk. */ -#define ELF_ET_DYN_BASE ((TASK_SIZE / 3) * 2) +#define ELF_ET_DYN_BASE ((DEFAULT_MAP_WINDOW / 3) * 2) #ifdef CONFIG_64BIT #ifdef CONFIG_COMPAT diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 75970ee2bda2..bb0b9ac7b581 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -62,11 +62,16 @@ * struct pages to map half the virtual address space. Then * position vmemmap directly below the VMALLOC region. */ +#define VA_BITS_SV32 32 #ifdef CONFIG_64BIT +#define VA_BITS_SV39 39 +#define VA_BITS_SV48 48 +#define VA_BITS_SV57 57 + #define VA_BITS (pgtable_l5_enabled ? \ - 57 : (pgtable_l4_enabled ? 48 : 39)) + VA_BITS_SV57 : (pgtable_l4_enabled ? VA_BITS_SV48 : VA_BITS_SV39)) #else -#define VA_BITS 32 +#define VA_BITS VA_BITS_SV32 #endif #define VMEMMAP_SHIFT \ @@ -111,11 +116,27 @@ #include #include #include +#include #define __page_val_to_pfn(_val) (((_val) & _PAGE_PFN_MASK) >> _PAGE_PFN_SHIFT) #ifdef CONFIG_64BIT #include + +#define VA_USER_SV39 (UL(1) << (VA_BITS_SV39 - 1)) +#define VA_USER_SV48 (UL(1) << (VA_BITS_SV48 - 1)) +#define VA_USER_SV57 (UL(1) << (VA_BITS_SV57 - 1)) + +#ifdef CONFIG_COMPAT +#define MMAP_VA_BITS_64 ((VA_BITS >= VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS) +#define MMAP_MIN_VA_BITS_64 (VA_BITS_SV39) +#define MMAP_VA_BITS (is_compat_task() ? VA_BITS_SV32 : MMAP_VA_BITS_64) +#define MMAP_MIN_VA_BITS (is_compat_task() ? VA_BITS_SV32 : MMAP_MIN_VA_BITS_64) +#else +#define MMAP_VA_BITS ((VA_BITS >= VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS) +#define MMAP_MIN_VA_BITS (VA_BITS_SV39) +#endif /* CONFIG_COMPAT */ + #else #include #endif /* CONFIG_64BIT */ diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index c950a8d9edef..3e23e1786d05 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -13,19 +13,59 @@ #include +#ifdef CONFIG_64BIT +#define DEFAULT_MAP_WINDOW (UL(1) << (MMAP_VA_BITS - 1)) +#define STACK_TOP_MAX TASK_SIZE_64 + +#define arch_get_mmap_end(addr, len, flags) \ +({ \ + unsigned long mmap_end; \ + typeof(addr) _addr = (addr); \ + if ((_addr) == 0 || (IS_ENABLED(CONFIG_COMPAT) && is_compat_task())) \ + mmap_end = STACK_TOP_MAX; \ + else if ((_addr) >= VA_USER_SV57) \ + mmap_end = STACK_TOP_MAX; \ + else if ((((_addr) >= VA_USER_SV48)) && (VA_BITS >= VA_BITS_SV48)) \ + mmap_end = VA_USER_SV48; \ + else \ + mmap_end = VA_USER_SV39; \ + mmap_end; \ +}) + +#define arch_get_mmap_base(addr, base) \ +({ \ + unsigned long mmap_base; \ + typeof(addr) _addr = (addr); \ + typeof(base) _base = (base); \ + unsigned long rnd_gap = DEFAULT_MAP_WINDOW - (_base); \ + if ((_addr) == 0 || (IS_ENABLED(CONFIG_COMPAT) && is_compat_task())) \ + mmap_base = (_base); \ + else if (((_addr) >= VA_USER_SV57) && (VA_BITS >= VA_BITS_SV57)) \ + mmap_base = VA_USER_SV57 - rnd_gap; \ + else if ((((_addr) >= VA_USER_SV48)) && (VA_BITS >= VA_BITS_SV48)) \ + mmap_base = VA_USER_SV48 - rnd_gap; \ + else \ + mmap_base = VA_USER_SV39 - rnd_gap; \ + mmap_base; \ +}) + +#else +#define DEFAULT_MAP_WINDOW TASK_SIZE +#define STACK_TOP_MAX TASK_SIZE +#endif +#define STACK_ALIGN 16 + +#define STACK_TOP DEFAULT_MAP_WINDOW + /* * This decides where the kernel will search for a free chunk of vm * space during mmap's. */ -#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) - -#define STACK_TOP TASK_SIZE #ifdef CONFIG_64BIT -#define STACK_TOP_MAX TASK_SIZE_64 +#define TASK_UNMAPPED_BASE PAGE_ALIGN((UL(1) << MMAP_MIN_VA_BITS) / 3) #else -#define STACK_TOP_MAX TASK_SIZE +#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) #endif -#define STACK_ALIGN 16 #ifndef __ASSEMBLY__