From patchwork Tue Aug 22 13:56:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 13360867 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0B6CEE4993 for ; Tue, 22 Aug 2023 14:04:52 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 785EC280021; Tue, 22 Aug 2023 10:04:52 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 7365B28001C; Tue, 22 Aug 2023 10:04:52 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 5D731280021; Tue, 22 Aug 2023 10:04:52 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id 4E13F28001C for ; Tue, 22 Aug 2023 10:04:52 -0400 (EDT) Received: from smtpin14.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay05.hostedemail.com (Postfix) with ESMTP id 2FABF4038A for ; Tue, 22 Aug 2023 14:04:52 +0000 (UTC) X-FDA: 81151911624.14.DBB92E7 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by imf30.hostedemail.com (Postfix) with ESMTP id 3A9898003D for ; Tue, 22 Aug 2023 14:04:50 +0000 (UTC) Authentication-Results: imf30.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=VFvp4KQn; dmarc=pass (policy=none) header.from=kernel.org; spf=pass (imf30.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1692713090; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=GVW/Wb+UQgRbZFsiBWrQq9WDN9Jw1tFXrIhcblQEjIs=; b=HRvYbxnxoSOV1fomtVGkr4Er+3K6j4Nah2mo8BOcObU45msU0ffnPQng1Mk+btYCbtmLL3 mL63iO9RbkYzBpMm5A2qa+8kuNotpK2uZnjg95yqpCVXytriSWmaU6Ce8YRfSBFMsQo9+I WDKSZQR6HGOfy27SVy9BwnepqAqxX3Y= ARC-Authentication-Results: i=1; imf30.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=VFvp4KQn; dmarc=pass (policy=none) header.from=kernel.org; spf=pass (imf30.hostedemail.com: domain of broonie@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=broonie@kernel.org ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1692713090; a=rsa-sha256; cv=none; b=hp6mpMW4P+ixL2hVfZ9urLkoNVG9DM4xbrmKU/sBeXQzUj7Pmzdfd1lnBDTEgaPyVs3dKY yydNMPSH++FcKor4zSy3vVt/IR4rpX0J6r7TJfX1ybLdkGh0U/UjFtVWjMfW8ovkYvk6rW fnCicQY/m7+0iRXJdKfPnLywaqFa8qg= Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6CA98657AD; Tue, 22 Aug 2023 14:04:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CA557C433C8; Tue, 22 Aug 2023 14:04:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692713088; bh=sSLA8c9zD81mYMEEIJgpRALMzE62vMXK9V14WuQWjaE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=VFvp4KQnPyU2rWEfjMMrh+j9Lx2GSKt7vrJSKS6QpMLJ5ThXjdS81B7yXUnwegUCG UNPeiT2uXRIR7zF29isIbOv1B5b10NMFx+loedPnhg+/G3Vu+anfvZSk/gfLQZ1AIz xA4dppy8Q6L1uUDDzbydR17zlvTgp9gKggKKyaFrlBK3C/o0zfeR9wYjF/czlR7eJb JjpHZrGcHbHFJy0xQu98hTDXoPOZa3pXy5+pDYi+duYDDJEj1vDunL3PEONor2wn6K FHmZsX9FlLK2tBH8OAczAGU/2uc9zW3TM+8tKoZJQ7Za2z+Ot0tUJ/ykM/kmEoqGCU AIT2kCOmHUuIg== From: Mark Brown Date: Tue, 22 Aug 2023 14:56:50 +0100 Subject: [PATCH v5 17/37] arm64/traps: Handle GCS exceptions MIME-Version: 1.0 Message-Id: <20230822-arm64-gcs-v5-17-9ef181dd6324@kernel.org> References: <20230822-arm64-gcs-v5-0-9ef181dd6324@kernel.org> In-Reply-To: <20230822-arm64-gcs-v5-0-9ef181dd6324@kernel.org> To: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Arnd Bergmann , Oleg Nesterov , Eric Biederman , Kees Cook , Shuah Khan , "Rick P. Edgecombe" , Deepak Gupta , Ard Biesheuvel , Szabolcs Nagy Cc: "H.J. Lu" , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Brown X-Mailer: b4 0.13-dev-034f2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6026; i=broonie@kernel.org; h=from:subject:message-id; bh=sSLA8c9zD81mYMEEIJgpRALMzE62vMXK9V14WuQWjaE=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBk5L/91gGtCTa81js6HUfc/KOxz76ZImClOzmKE3PL n6kyoR2JATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZOS//QAKCRAk1otyXVSH0A6/B/ 9WTHcev1+Jc8U6IHhxNKxL9A//TRcWISzTvABnCwLPHQJeNv7c0ag/W7YsnAy3/83D6IoWNpUYVLjq u8teZ0BKbmIOkfWdfbDgQypF14UsWn8WcsSlnQ9xcYNGmLZ3a7GjDfYftdeplq2rB3IJCzOabnYR2q 7VWIPho8MSr7iwfzugxrD3AbogETKz9QK9rzYe7fSXDPvTxuBJWSX8rzEMzIOaflFVguj7ZaI7cybn lzd/B0YeXDYBe4i3xSorAVpiBVZ7XgC3+x96c0rfFVpW2hhSOAR1TXs3AOYCR+ZUpxA18wfD7OZLsz WZC+qX328xIjTyrDsacGCWcWtTylKd X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 3A9898003D X-Stat-Signature: wwpf7yt9pa9hque8178pzzfk9izpmk5q X-HE-Tag: 1692713090-563050 X-HE-Meta: U2FsdGVkX1/eXoGyLWyAvefQGFH3IgSrJF9wl5PN38FzUBA5mMqdMxct1ofYFtanzStGU+upiXVnmI5WkLmxzveKDj67jXlPVAc9wCdJlPB9lPbUC41ycZWrey6+PvTUchljN1t+mJhUaNgTjN1PRRBWjveqO2lJVa3yRRWvbcDmC0BYHj3rEqoYAr244suvLx03av/MCx+/4lJI8B9HfBFPiYgIxB5R1j0ffnJDoGDww+5Z4hitJaJw1m+AHzfacoHF8QON5v5vmL8X03s33eYPnyveFrY0TGOa0Vk2q7jQHTpDQVpN4oZTt6E5rjU2lLeWUmYMXW5TswwZTxaRu9E/RTi3xDuKDOmTlOkPXotJcuGVOmIBDmALQXM7HRfrTnLbrdXjiP3R9VotC7C+aszURW7BhInHF2+QDR4H+yUE19LzGqZnN6T7mzeveaBDixxOvTSRFi+b20zFXotuK4pQw5qBSW4pgBD6eDGQ5fClpYwcdJh8qpt8yEJ+RtATYfS0D6tjRJjDf1oo6Js5F3TL6UTkECdF7L157WbvNktdYD9mXw2HrNrPmPm2OL8Sq4FleshJtrK0tqn5gc3d5KMJcNs/JBiYSzwqK/K8/oVhP+qLq4OLBJctSU/C2pT6UgbsquIBtUt9cOVIAFDk/QyyRXTYa0iNC+SB/QCSw/wxGjJvPSPchhy+jyubI9yWcH2gCDmBddh1SLW3qP5anO1LBzlR24U9jmX9mLnrIvilgXSR9bWsaoguN6P8/XYxlQeWqwtXQuJv+0fMRB6iTn06bcctuXLPIxik955yekLCwDsK2nOGmisqCRhlxPtP1uQ9eKg7fw8oag+6+SeYFzDafrk9pWf/tt++25mBqO5qahDvN8FUtX3tc7/QQIsrKhzXrYE2syLInP+hmZtVD2IRLm7tE4Zhx4ViB5hwiRrdMT0eXjRYCOTyW2xyw1/3WXFoP9LELzma6N/E290 8hh2lwR5 BDiRssI0qHN25Aiu1XdnB1q/NxSlukCaeGPbqC2LYfOVPeHQeY1rjFMr9nz4NNba20eMrI7le2UCVzgzAgwPDHvstH/JvoVrmccKbQjjE+Nol0ChR8AJpcgTJQ6waD6oQCivigl/yiMDiOzSuPbCnZBWP27zNl8NmmqgYu1qJx9vLn4n2HiKZSGNik42Avse+/FNZwjb7tErnh0BIlPoCUGNa8CT03Le7XboKoQatoz8/LXgwpuZaKpaMam4Fka7TwKy3o9QEHOTHOFA6fsP/ZO5FG5NfvvGAyIM73EZd6MXMr5O6DFxVpn7qrrGU0HddlPRcI8y8Nk5xDsIY9OMnxkGM+SmiX0vw4i9PnadGjQhve92yBj7rSWTtY3dtT4gbODYmi1eLOmW5x5v3Qv4KWprXzfx4H/svtkmoDe+MLO+aTNE= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: A new exception code is defined for GCS specific faults other than standard load/store faults, for example GCS token validation failures, add handling for this. These faults are reported to userspace as segfaults with code SEGV_CPERR (protection error), mirroring the reporting for x86 shadow stack errors. GCS faults due to memory load/store operations generate data aborts with a flag set, these will be handled separately as part of the data abort handling. Since we do not currently enable GCS for EL1 we should not get any faults there but while we're at it we wire things up there, treating any GCS fault as fatal. Signed-off-by: Mark Brown --- arch/arm64/include/asm/esr.h | 28 +++++++++++++++++++++++++++- arch/arm64/include/asm/exception.h | 2 ++ arch/arm64/kernel/entry-common.c | 23 +++++++++++++++++++++++ arch/arm64/kernel/traps.c | 11 +++++++++++ 4 files changed, 63 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index ae35939f395b..a87a8305051f 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -51,7 +51,8 @@ #define ESR_ELx_EC_FP_EXC32 (0x28) /* Unallocated EC: 0x29 - 0x2B */ #define ESR_ELx_EC_FP_EXC64 (0x2C) -/* Unallocated EC: 0x2D - 0x2E */ +#define ESR_ELx_EC_GCS (0x2D) +/* Unallocated EC: 0x2E */ #define ESR_ELx_EC_SERROR (0x2F) #define ESR_ELx_EC_BREAKPT_LOW (0x30) #define ESR_ELx_EC_BREAKPT_CUR (0x31) @@ -382,6 +383,31 @@ #define ESR_ELx_MOPS_ISS_SRCREG(esr) (((esr) & (UL(0x1f) << 5)) >> 5) #define ESR_ELx_MOPS_ISS_SIZEREG(esr) (((esr) & (UL(0x1f) << 0)) >> 0) +/* ISS field definitions for GCS */ +#define ESR_ELx_ExType_SHIFT (20) +#define ESR_ELx_ExType_MASK GENMASK(23, 20) +#define ESR_ELx_Raddr_SHIFT (10) +#define ESR_ELx_Raddr_MASK GENMASK(14, 10) +#define ESR_ELx_Rn_SHIFT (5) +#define ESR_ELx_Rn_MASK GENMASK(9, 5) +#define ESR_ELx_Rvalue_SHIFT 5 +#define ESR_ELx_Rvalue_MASK GENMASK(9, 5) +#define ESR_ELx_IT_SHIFT (0) +#define ESR_ELx_IT_MASK GENMASK(4, 0) + +#define ESR_ELx_ExType_DATA_CHECK 0 +#define ESR_ELx_ExType_EXLOCK 1 +#define ESR_ELx_ExType_STR 2 + +#define ESR_ELx_IT_RET 0 +#define ESR_ELx_IT_GCSPOPM 1 +#define ESR_ELx_IT_RET_KEYA 2 +#define ESR_ELx_IT_RET_KEYB 3 +#define ESR_ELx_IT_GCSSS1 4 +#define ESR_ELx_IT_GCSSS2 5 +#define ESR_ELx_IT_GCSPOPCX 6 +#define ESR_ELx_IT_GCSPOPX 7 + #ifndef __ASSEMBLY__ #include diff --git a/arch/arm64/include/asm/exception.h b/arch/arm64/include/asm/exception.h index ad688e157c9b..99caff458e20 100644 --- a/arch/arm64/include/asm/exception.h +++ b/arch/arm64/include/asm/exception.h @@ -57,6 +57,8 @@ void do_el0_undef(struct pt_regs *regs, unsigned long esr); void do_el1_undef(struct pt_regs *regs, unsigned long esr); void do_el0_bti(struct pt_regs *regs); void do_el1_bti(struct pt_regs *regs, unsigned long esr); +void do_el0_gcs(struct pt_regs *regs, unsigned long esr); +void do_el1_gcs(struct pt_regs *regs, unsigned long esr); void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr, struct pt_regs *regs); void do_fpsimd_acc(unsigned long esr, struct pt_regs *regs); diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index 6b2e0c367702..4d86216962e5 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -400,6 +400,15 @@ static void noinstr el1_bti(struct pt_regs *regs, unsigned long esr) exit_to_kernel_mode(regs); } +static void noinstr el1_gcs(struct pt_regs *regs, unsigned long esr) +{ + enter_from_kernel_mode(regs); + local_daif_inherit(regs); + do_el1_gcs(regs, esr); + local_daif_mask(); + exit_to_kernel_mode(regs); +} + static void noinstr el1_dbg(struct pt_regs *regs, unsigned long esr) { unsigned long far = read_sysreg(far_el1); @@ -442,6 +451,9 @@ asmlinkage void noinstr el1h_64_sync_handler(struct pt_regs *regs) case ESR_ELx_EC_BTI: el1_bti(regs, esr); break; + case ESR_ELx_EC_GCS: + el1_gcs(regs, esr); + break; case ESR_ELx_EC_BREAKPT_CUR: case ESR_ELx_EC_SOFTSTP_CUR: case ESR_ELx_EC_WATCHPT_CUR: @@ -621,6 +633,14 @@ static void noinstr el0_mops(struct pt_regs *regs, unsigned long esr) exit_to_user_mode(regs); } +static void noinstr el0_gcs(struct pt_regs *regs, unsigned long esr) +{ + enter_from_user_mode(regs); + local_daif_restore(DAIF_PROCCTX); + do_el0_gcs(regs, esr); + exit_to_user_mode(regs); +} + static void noinstr el0_inv(struct pt_regs *regs, unsigned long esr) { enter_from_user_mode(regs); @@ -701,6 +721,9 @@ asmlinkage void noinstr el0t_64_sync_handler(struct pt_regs *regs) case ESR_ELx_EC_MOPS: el0_mops(regs, esr); break; + case ESR_ELx_EC_GCS: + el0_gcs(regs, esr); + break; case ESR_ELx_EC_BREAKPT_LOW: case ESR_ELx_EC_SOFTSTP_LOW: case ESR_ELx_EC_WATCHPT_LOW: diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 8b70759cdbb9..65dab959f620 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -500,6 +500,16 @@ void do_el1_bti(struct pt_regs *regs, unsigned long esr) die("Oops - BTI", regs, esr); } +void do_el0_gcs(struct pt_regs *regs, unsigned long esr) +{ + force_signal_inject(SIGSEGV, SEGV_CPERR, regs->pc, 0); +} + +void do_el1_gcs(struct pt_regs *regs, unsigned long esr) +{ + die("Oops - GCS", regs, esr); +} + void do_el0_fpac(struct pt_regs *regs, unsigned long esr) { force_signal_inject(SIGILL, ILL_ILLOPN, regs->pc, esr); @@ -884,6 +894,7 @@ static const char *esr_class_str[] = { [ESR_ELx_EC_MOPS] = "MOPS", [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)", [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)", + [ESR_ELx_EC_GCS] = "Guarded Control Stack", [ESR_ELx_EC_SERROR] = "SError", [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)", [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",