Message ID | 20230927140123.5283-4-joey.gouly@arm.com (mailing list archive) |
---|---|
State | New |
Headers | show
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Wed, 27 Sep 2023 14:01:35 +0000 From: Joey Gouly <joey.gouly@arm.com> To: <linux-arm-kernel@lists.infradead.org> CC: <nd@arm.com>, <akpm@linux-foundation.org>, <aneesh.kumar@linux.ibm.com>, <catalin.marinas@arm.com>, <dave.hansen@linux.intel.com>, <joey.gouly@arm.com>, <maz@kernel.org>, <oliver.upton@linux.dev>, <shuah@kernel.org>, <will@kernel.org>, <kvmarm@lists.linux.dev>, <linux-fsdevel@vger.kernel.org>, <linux-mm@kvack.org>, <linux-kselftest@vger.kernel.org> Subject: [PATCH v1 03/20] arm64: cpufeature: add Permission Overlay Extension cpucap Date: Wed, 27 Sep 2023 15:01:06 +0100 Message-ID: <20230927140123.5283-4-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230927140123.5283-1-joey.gouly@arm.com> References: <20230927140123.5283-1-joey.gouly@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT048:EE_|PAVPR08MB9064:EE_|AM7EUR03FT017:EE_|AS2PR08MB9450:EE_ X-MS-Office365-Filtering-Correlation-Id: e22bae68-0b61-4858-10dc-08dbbf628f5e x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 444a73c2e638..902885f59396 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2719,6 +2719,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .matches = has_cpuid_feature, ARM64_CPUID_FIELDS(ID_AA64MMFR2_EL1, EVT, IMP) }, + { + .desc = "Stage-1 Permission Overlay Extension (S1POE)", + .capability = ARM64_HAS_S1POE, + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, + .matches = has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP) + }, {}, }; diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index c3f06fdef609..b8348e40f6d9 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -43,6 +43,7 @@ HAS_NO_FPSIMD HAS_NO_HW_PREFETCH HAS_PAN HAS_S1PIE +HAS_S1POE HAS_RAS_EXTN HAS_RNG HAS_SB
This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE as the boot CPU will enable POE if it has it, so secondary CPUs must also have this feature. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> --- arch/arm64/kernel/cpufeature.c | 7 +++++++ arch/arm64/tools/cpucaps | 1 + 2 files changed, 8 insertions(+)