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Fri, 24 Nov 2023 08:35:27 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 03/25] arm64: cpufeature: add Permission Overlay Extension cpucap Date: Fri, 24 Nov 2023 16:34:48 +0000 Message-Id: <20231124163510.1835740-4-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: AD42320024 X-Rspam-User: X-Stat-Signature: jsdbsuaneckkptn3fpn81ja3zztirgzs X-Rspamd-Server: rspam03 X-HE-Tag: 1700843730-616157 X-HE-Meta: U2FsdGVkX19VykZqd2/2mJ/twCVtQtLuvmOGLIrgHqWcP523SxQeytMmDME444F1pRwpytC5M/PwgfNquvlnSvHRDwbnme6W/HJn6NgCgqYkfBdab4F+YUg4LH4jOS+KnKQaaIVHR95/+Un7Sfmr4146x9ZG6Me3Sb/YPUvETK/ro+H3cTN/oUwv7+1d+WIo1OpFHFTgM2manonjO84A95aUibI5j8Lq927Ko0wqpSAQi1VaNfc+TJ3S+vN6T3BDdeWERg0nFr+bgg1IXiUXCe4wdR2redTaEvdAbIS9s9dzDa5eh2hVZvFnG16u7poirLmYPagyonY+Q9oTiBAzs0tSNwu4HckMtoTY3JyeJAuC3vLMjKqTBSc3kdF5/YxuYW+xLDcd1IdIOklNamh2KUH0fG9YTH9ksVgBckwfiSIFNLCpTgkOwTtfx0wsBQdDNlivIWe8loEZTq6CF5Bg1IcbJ5uzVMj83+cHC9f9eGC96O0o3mLzxu21pS9IYXQWgyM7ymE6qD5IbF+UDvTkFC4oqkv7IUjrfsPJ775BSLwDBhfQdqqbqZYkNcRN/rpwVjdcxD2QRqt2UiSrgysyxEd3jrF7hMhqGjae4Z9wB970OKuVZqlhSBMsKrbyfdZu3n2o2fvt7ZiMilIXS1l1MEnMbF7g9peCnFMOVp6bsYjK0ZTwlUH0MNhzhxVa6GA+s4v4VdQGhoOFHjAaQWfNflH2Y/9TzZKMWHrkVztoUH/WI/zdDpc3oKDbcuBaBD+rTdszcXIdmSwrxGQCrIT2mMMISHwVYiBfCMQI120DKtHEpRTH7kZ1D7dhHQKF/PkhM1S/EcNBMVAodOJEtIOlVbyQdSMxyKDzBFrI1eykOu+fOxdTS+ajfDm+IUw5rdFCBtUQIjR0xJNl2rSPtdQf66ZTJeEgkHecxy1VGb6R4im+k9XQQyGuJPKC13KY70ly1pt7AwdgvhgITYrQ6qZ 0DpKXkbg uSar1ywLbImI7lPutIMwBb22SmUMbKh50uienubGT14lF50i8yv5dg2G3fLL7QN4WlZrjyCua61mPiTP5NJaHMIy/QVpGFp7TVNdU3m8SfZ5Z2RIoPQcRZs0x3Szm3BbkQX+pAf6xpF7VSwsTuGfPDRFEanbC1A702kcQ1Eh0lElR1qEbdF2L2Ck8ypFVbKIp4DNRz8gKOZXwy/otmv21M88wKQ== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE as the boot CPU will enable POE if it has it, so secondary CPUs must also have this feature. Add a new config option: ARM64_POE Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/Kconfig | 16 ++++++++++++++++ arch/arm64/kernel/cpufeature.c | 9 +++++++++ arch/arm64/tools/cpucaps | 1 + 3 files changed, 26 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 7b071a00425d..d7df6c603190 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2078,6 +2078,22 @@ config ARM64_EPAN if the cpu does not implement the feature. endmenu # "ARMv8.7 architectural features" +menu "ARMv8.9 architectural features" +config ARM64_POE + prompt "Permission Overlay Extension" + def_bool y + help + The Permission Overlay Extension is used to implement Memory + Protection Keys. Memory Protection Keys provides a mechanism for + enforcing page-based protections, but without requiring modification + of the page tables when an application changes protection domains. + + For details, see Documentation/core-api/protection-keys.rst + + If unsure, say y. + +endmenu # "ARMv8.9 architectural features" + config ARM64_SVE bool "ARM Scalable Vector Extension support" default y diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 646591c67e7a..00b6d516ed3f 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2731,6 +2731,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .matches = has_cpuid_feature, ARM64_CPUID_FIELDS(ID_AA64MMFR2_EL1, EVT, IMP) }, +#ifdef CONFIG_ARM64_POE + { + .desc = "Stage-1 Permission Overlay Extension (S1POE)", + .capability = ARM64_HAS_S1POE, + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, + .matches = has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP) + }, +#endif {}, }; diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index b98c38288a9d..bbd2fac9345a 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -43,6 +43,7 @@ HAS_NESTED_VIRT HAS_NO_HW_PREFETCH HAS_PAN HAS_S1PIE +HAS_S1POE HAS_RAS_EXTN HAS_RNG HAS_SB