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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Dec 2023 17:36:30.6830 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fc980c27-6a4d-4243-8ec3-08dc095ddc08 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV3PR12MB9412 X-Rspam-User: X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: 3BE481C0003 X-Stat-Signature: cjyo7u5pgisyo3o5z1ggsorahtnnitfp X-HE-Tag: 1703957795-996018 X-HE-Meta: U2FsdGVkX1/ymUnqnVwxVMQNQ4te4mtyOvidJx7AHCJpJlgjWPB1VbISa7fXoW6d08omI5v54zLRsat+4e4CpJw4luZVMLfN5RmOta25qMWUT8pVQM6bnZJ3qD+4zOt5XhudweChv8dh7+4GOTVPBkBXllf6KPeT+ClCTYNDjfp7QT4rm2TqsznJJgI8mwMzDie0sM+IH6hPYigo+XhgAeO6pndhkVlV+scJDIrqHCzvlcg4Y+1SxntKAj95zeCFKtJlQX57KNJ+ZFOiTAUsBGsG0Ai8bSYd5Ns9pvjwkbLPekL9OVC77PnlHtkeLiCbAjafLJF6j8yjC/LhoZMZ6S4G9Mrx7hebRktSD864pbDwRoYwplkkaIGKsxxdhk1s8Ftk7gK48LFkRlLqP7F6eF8P0sCtOIqsdhO8q0fCWE+UtdaUCbDZ9yUlAIi6pAm7tPm3cZ8cviucriwZXlHiED6lfkzVnYMHxZoL6jbkfBgh1S3SRXOmzhlZA541+QO+/5Eix5qDgsFUNNPDV1eXfCQ2mzGXejf+UPZmu2vXRLtuUBc36qL8Hp8nAvHYkPnWbdrubtram4ulzDcI9H2lJgGpFpxyRxaRpLFWAqLypXDZhP9cQI6Y1gCdwJrIdhcl2OG43IuAJDALDNrY8BFROLXorsXdlvyHu9xvMikL1DEOS2biEWMphWU/onxFs7sr50ZHVSpDeZRx6WOxEBuTVMaEE+MgJVzoIbTSHoErVPPqlPaBVeSexklH9yw6q5rVy92VRnHiR2qdaBFvmVddoDvp+dC/hzGAAvuoe+i9vTiHszx42VT6fJQkRbQbl/7x/Bkk9wMQ0TQI77AU4kgRYssirryUyPuex/GChUgO6k9wtu3WKShHPoNt1axbHGKdWedec65vMum4iFpA8x37EanUCV22qGkSGM7kNepLrjctN5P2zO0OsgfBasYAuvOdT2xyh7VOuY1bG5Mh18/ ucMi1OOw OlxFWui6Fom6BNoEAos4ZHyRgKzoN270dvO8tMRSdQbMT9hAumwoJEkHL/AynBEQ4fbYf7CoJgmsSxHLy+FTQWy4EuXlVCY/qlmHL5QPMKR9Dm9FaHfmJLbTe7UjauPP77+aWxbbc2R2l359yCDfQmsHwIJV4ayH2q+apeffrisob+V5zi2729B9FrT4YCqheFMvZp/FC6gI5+ynHe9GEnW4ZvBK8DiXTxuKDjvzkMXjOIyeofF1VGgbwEO2yG8F3B8F5CV02JgBSrqQ7tdSMXy50jpbfzF9EDQtiBM7hRAxF55C9shI7AFTMZmUKfIQJHNogxJFAnWwMyVhsRYjXxb0Mzqgg19vNvddB+R1EhUCWNpV1Bd7V0Xy6Vw== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Brijesh Singh When SEV-SNP is enabled globally, the hardware places restrictions on all memory accesses based on the RMP entry, whether the hypervisor or a VM, performs the accesses. When hardware encounters an RMP access violation during a guest access, it will cause a #VMEXIT(NPF) with a number of additional bits set to indicate the reasons for the #NPF. Define those here. See APM2 section 16.36.10 for more details. Signed-off-by: Brijesh Singh Signed-off-by: Ashish Kalra [mdr: add some additional details to commit message] Signed-off-by: Michael Roth --- arch/x86/include/asm/kvm_host.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index e38cab5dccae..843695217b4b 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -262,9 +262,13 @@ enum x86_intercept_stage; #define PFERR_FETCH_BIT 4 #define PFERR_PK_BIT 5 #define PFERR_SGX_BIT 15 +#define PFERR_GUEST_RMP_BIT 31 #define PFERR_GUEST_FINAL_BIT 32 #define PFERR_GUEST_PAGE_BIT 33 #define PFERR_IMPLICIT_ACCESS_BIT 48 +#define PFERR_GUEST_ENC_BIT 34 +#define PFERR_GUEST_SIZEM_BIT 35 +#define PFERR_GUEST_VMPL_BIT 36 #define PFERR_PRESENT_MASK BIT(PFERR_PRESENT_BIT) #define PFERR_WRITE_MASK BIT(PFERR_WRITE_BIT) @@ -276,6 +280,10 @@ enum x86_intercept_stage; #define PFERR_GUEST_FINAL_MASK BIT_ULL(PFERR_GUEST_FINAL_BIT) #define PFERR_GUEST_PAGE_MASK BIT_ULL(PFERR_GUEST_PAGE_BIT) #define PFERR_IMPLICIT_ACCESS BIT_ULL(PFERR_IMPLICIT_ACCESS_BIT) +#define PFERR_GUEST_RMP_MASK BIT_ULL(PFERR_GUEST_RMP_BIT) +#define PFERR_GUEST_ENC_MASK BIT_ULL(PFERR_GUEST_ENC_BIT) +#define PFERR_GUEST_SIZEM_MASK BIT_ULL(PFERR_GUEST_SIZEM_BIT) +#define PFERR_GUEST_VMPL_MASK BIT_ULL(PFERR_GUEST_VMPL_BIT) #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ PFERR_WRITE_MASK | \