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Tue, 02 Jan 2024 14:01:45 -0800 (PST) Received: from sw06.internal.sifive.com ([4.53.31.132]) by smtp.gmail.com with ESMTPSA id r59-20020a17090a43c100b0028ce507cd7dsm101724pjg.55.2024.01.02.14.01.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 14:01:45 -0800 (PST) From: Samuel Holland To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, Alexandre Ghiti , Samuel Holland Subject: [PATCH v4 08/12] riscv: mm: Introduce cntx2asid/cntx2version helper macros Date: Tue, 2 Jan 2024 14:00:45 -0800 Message-ID: <20240102220134.3229156-9-samuel.holland@sifive.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240102220134.3229156-1-samuel.holland@sifive.com> References: <20240102220134.3229156-1-samuel.holland@sifive.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 5FBB04000C X-Rspam-User: X-Stat-Signature: mzzd8u3wdx79wnitm4hbx4huq56q7644 X-Rspamd-Server: rspam03 X-HE-Tag: 1704232906-538272 X-HE-Meta: U2FsdGVkX18Q5960fK7+gv2iixh8ptxP6lX1GXrwH0zR7YUdTvR/VZ+1XYDSAPpHMU3ppoobVePzrIdvPcPJ7QMpGw2zqER7qmNeinriBwMfLumBWO9j24HURQ2aQHxRH4jMUDy9l6tha07gGiTEBHHgkfOS5qQsVH+JfBPPn8HFZBEbDl24gjQDroJzPAO9sHoewXku1QurZEMOIvWt/uLAt7+TxcdhfKuFK49zcke75bfCsUqXYLWWsxWlmThLob7CurABLG4ZEeTLXIhMrv/GkYCPywXSMAzxAhjG97WGad1TQAL9su9jCK8eqdct7akwsfWYB87AAk7kqRu137AOeG/H6R8iUoOrVnU/AkpKhAUPqbPEA/QNunpQh2BIVIAVq1Eui3u62KmWRgQbTAqB1B64cJITknlnCTYNQGb9UM/mCj7C0DrtFSytodswTvf0lPdC8vwSkHNZm10vCjjNw0iIr5DSgwFmGnua4cIWkr+pm7QMlqa3uMmKM6l8BinaaA4i7DmCZTXcOhyy67WgNiuJ9dj5N9VxKa/7Zy8yf+4YFSJQL2q9S3s+D5VlmR4wCASmG79j47BKATEEvJPBjDVG/rr5n9vGNcHwGUXcdkc5+W1cUuJulMGy1tYY7+cQHLFWhFdzG16Mt8zkTdfYR4x+agbqxZF9jJu0NYiEqaLVd6ziHySprbna4FFEt5jzOdfU/GREeeapVT3DHHDblm1ZXLOnSDdGF6AjZ+XtaV73z3UDtN8urDGATPL85N6OUz+Bnqk+PYqJoaE9fU+VgSauqaIG+rfDdKau1JqPSpIlphCHq9C04tAyE2nv/aTRmsDAGGlk48ZhNkZAnT9fvObZwzatjr+m7cdzGfDanoq08fSYRsWk9D8nOr1E0derbqrM1n6xXGmi7CdcxwlN+VxkrxL5mTLUHnv+LpLaZOVHbRIA7diH6yrdlFMNkENLxs4IFnk4VDr5Kv4 i9T+ekAc Q9DBgmHj9LdpbqEwr65SZC9EvYfGCIFppbMHgKzSHL9SZ/s6Kzlm2m7JyTXnOsy3ee1qHNzcvf2LN6XnqWn4QKspOM6t1a8DFVn1iLTQyqPAAf2vuaZ1/Iy7SBdgQiVpmah0cmMj08Jj7DT5pJAuvXNILwaL7R48irLCpoljb73gXIAF7lxnQleMUMaf9djmcBIMkcUAxN8BCdOkBkLsXfyshN9B+rWU+AZjDVH6v5bPgVZ2G3vzLypr0IQIh1E+U5/13x2Ipz26MPciM4Jq7Z2TfetG70mMZpmxRH0dLp+CYzBKZUyskVg7Hn9EqIGMRbckHat74fo9TGqp4c3HuzakZxhnxCxgsdoxK8vOHdGHjtTc8iX8DUyY+S+wjAfleWeNTvvohECWoI28= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000351, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: When using the ASID allocator, the MM context ID contains two values: the ASID in the lower bits, and the allocator version number in the remaining bits. Use macros to make this separation more obvious. Signed-off-by: Samuel Holland Reviewed-by: Alexandre Ghiti --- (no changes since v1) arch/riscv/include/asm/mmu.h | 3 +++ arch/riscv/mm/context.c | 12 ++++++------ arch/riscv/mm/tlbflush.c | 2 +- 3 files changed, 10 insertions(+), 7 deletions(-) diff --git a/arch/riscv/include/asm/mmu.h b/arch/riscv/include/asm/mmu.h index 355504b37f8e..a550fbf770be 100644 --- a/arch/riscv/include/asm/mmu.h +++ b/arch/riscv/include/asm/mmu.h @@ -26,6 +26,9 @@ typedef struct { #endif } mm_context_t; +#define cntx2asid(cntx) ((cntx) & asid_mask) +#define cntx2version(cntx) ((cntx) & ~asid_mask) + void __init create_pgd_mapping(pgd_t *pgdp, uintptr_t va, phys_addr_t pa, phys_addr_t sz, pgprot_t prot); #endif /* __ASSEMBLY__ */ diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c index 217fd4de6134..43d005f63253 100644 --- a/arch/riscv/mm/context.c +++ b/arch/riscv/mm/context.c @@ -81,7 +81,7 @@ static void __flush_context(void) if (cntx == 0) cntx = per_cpu(reserved_context, i); - __set_bit(cntx & asid_mask, context_asid_map); + __set_bit(cntx2asid(cntx), context_asid_map); per_cpu(reserved_context, i) = cntx; } @@ -102,7 +102,7 @@ static unsigned long __new_context(struct mm_struct *mm) lockdep_assert_held(&context_lock); if (cntx != 0) { - unsigned long newcntx = ver | (cntx & asid_mask); + unsigned long newcntx = ver | cntx2asid(cntx); /* * If our current CONTEXT was active during a rollover, we @@ -115,7 +115,7 @@ static unsigned long __new_context(struct mm_struct *mm) * We had a valid CONTEXT in a previous life, so try to * re-use it if possible. */ - if (!__test_and_set_bit(cntx & asid_mask, context_asid_map)) + if (!__test_and_set_bit(cntx2asid(cntx), context_asid_map)) return newcntx; } @@ -168,7 +168,7 @@ static void set_mm_asid(struct mm_struct *mm, unsigned int cpu) */ old_active_cntx = atomic_long_read(&per_cpu(active_context, cpu)); if (old_active_cntx && - ((cntx & ~asid_mask) == atomic_long_read(¤t_version)) && + (cntx2version(cntx) == atomic_long_read(¤t_version)) && atomic_long_cmpxchg_relaxed(&per_cpu(active_context, cpu), old_active_cntx, cntx)) goto switch_mm_fast; @@ -177,7 +177,7 @@ static void set_mm_asid(struct mm_struct *mm, unsigned int cpu) /* Check that our ASID belongs to the current_version. */ cntx = atomic_long_read(&mm->context.id); - if ((cntx & ~asid_mask) != atomic_long_read(¤t_version)) { + if (cntx2version(cntx) != atomic_long_read(¤t_version)) { cntx = __new_context(mm); atomic_long_set(&mm->context.id, cntx); } @@ -191,7 +191,7 @@ static void set_mm_asid(struct mm_struct *mm, unsigned int cpu) switch_mm_fast: csr_write(CSR_SATP, virt_to_pfn(mm->pgd) | - ((cntx & asid_mask) << SATP_ASID_SHIFT) | + (cntx2asid(cntx) << SATP_ASID_SHIFT) | satp_mode); if (need_flush_tlb) diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c index 76b24d4ed4ab..5ec621545c69 100644 --- a/arch/riscv/mm/tlbflush.c +++ b/arch/riscv/mm/tlbflush.c @@ -85,7 +85,7 @@ static void __flush_tlb_range(struct mm_struct *mm, unsigned long start, return; if (static_branch_unlikely(&use_asid_allocator)) - asid = atomic_long_read(&mm->context.id) & asid_mask; + asid = cntx2asid(atomic_long_read(&mm->context.id)); } else { cmask = cpu_online_mask; }