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Wed, 24 Jan 2024 22:30:25 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id t19-20020a056a00139300b006dd870b51b8sm3201139pfg.126.2024.01.24.22.30.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Jan 2024 22:30:25 -0800 (PST) From: debug@rivosinc.com To: rick.p.edgecombe@intel.com, broonie@kernel.org, Szabolcs.Nagy@arm.com, kito.cheng@sifive.com, keescook@chromium.org, ajones@ventanamicro.com, paul.walmsley@sifive.com, palmer@dabbelt.com, conor.dooley@microchip.com, cleger@rivosinc.com, atishp@atishpatra.org, alex@ghiti.fr, bjorn@rivosinc.com, alexghiti@rivosinc.com Cc: corbet@lwn.net, aou@eecs.berkeley.edu, oleg@redhat.com, akpm@linux-foundation.org, arnd@arndb.de, ebiederm@xmission.com, shuah@kernel.org, brauner@kernel.org, debug@rivosinc.com, guoren@kernel.org, samitolvanen@google.com, evan@rivosinc.com, xiao.w.wang@intel.com, apatel@ventanamicro.com, mchitale@ventanamicro.com, waylingii@gmail.com, greentime.hu@sifive.com, heiko@sntech.de, jszhang@kernel.org, shikemeng@huaweicloud.com, david@redhat.com, charlie@rivosinc.com, panqinglin2020@iscas.ac.cn, willy@infradead.org, vincent.chen@sifive.com, andy.chiu@sifive.com, gerg@kernel.org, jeeheng.sia@starfivetech.com, mason.huo@starfivetech.com, ancientmodern4@gmail.com, mathis.salmen@matsal.de, cuiyunhui@bytedance.com, bhe@redhat.com, chenjiahao16@huawei.com, ruscur@russell.cc, bgray@linux.ibm.com, alx@kernel.org, baruch@tkos.co.il, zhangqing@loongson.cn, catalin.marinas@arm.com, revest@chromium.org, josh@joshtriplett.org, joey.gouly@arm.com, shr@devkernel.io, omosnace@redhat.com, ojeda@kernel.org, jhubbard@nvidia.com, linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: [RFC PATCH v1 24/28] riscv: select config for shadow stack and landing pad instr support Date: Wed, 24 Jan 2024 22:21:49 -0800 Message-ID: <20240125062739.1339782-25-debug@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240125062739.1339782-1-debug@rivosinc.com> References: <20240125062739.1339782-1-debug@rivosinc.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 80154C0017 X-Stat-Signature: fo6dryfj93r3a9m13rpgct3xto6gtq1i X-HE-Tag: 1706164226-991366 X-HE-Meta: U2FsdGVkX19s5VDWxdmuLAYxwVky18J46QAr9sEke5oPZ5O3dNFr+hdiDrtIXLHTBt6UrhSdXQwB8qC83PmNHIiwwEiUiMKcVHxendd6YGQns2Esv9wsbbbjy6yLZAqNoXu+4DwW50g5m+fhMcDSKuWqYTPL2dKZVDBtvbSCRwbWpOD5q0vWZ0Lj/chRhoVsPoeY4qE5vED5Eqz0yM8vUDsN7BCVMRq2XGBUfH6otEir1DSWu6aw1ajps50PUu9kGOqYl/DfyETmwBeB3oXuZNZ+qyrGypxqFmfHBRnZ8oEBmlWVPmfEdIzrI2OXblpVaHlGx0PXw5a0SurUjiYUWolBjWR6UlxhoMCIh8bEj0urRPR9kQhGR9QDx+KO16Adscs1dzCJAcOMzLsV0OoiRShEwOu5vlQ0WfF1GAW1mwbD+Gg5yVtFHFyM81PQS7rwblXPz8yDvgSPh+fRq0Eu/ft8cmOFioj8TrLmPzNAK4aVLDplaoGandQUfccf446AXKDO+qzvdQnuM6+zzDPF4ukw8Lp9o4AGpp4oma5Yk7XrcR3mp9LLhgUlARVifnaKPHFrxEVi8NdLdHCuMklH5+tXsBLu8awfCBoaxhPfaubN72qeu1WMNH8cixUbmx63CkpLSo/SO/sosFHOBSM7RcK0WQem0CmgrFn11q2tq44V8lsRR+3bon9VxTkG7TEhipwVCuxeaN+Nsi06Fnn7r9ZTmdZ8tf3Tt+/A7rkkGYcGCpdVRfiDFAWy8j3geoN+mhhNlhQ4W1jYOtGGV+IHW54+CBRe9X0pnf+Ro7aL0m9MQq05uwbV6RBwKiOGGyhgiP6H7kfIGDN58KmihOy53MUQ+hIGdVDSLpR8FkAvvVoYDfRTnpOHOaNCNYwmbyShuK2l9RZaq0tZJXjewn9NxvPTvZy3zpgOccfYftYbCDrRrfoJPaQgjZY3P9PtaMlPv3SrEMmWGHjmmxFUKbz QeyFtDmM deRvkZzhcw5tl4oap7ofdgyhZW5j2yi2ou/xk5F7SxciaX9oRxC450LzJ0+NxXYbEFl6b16ypjL3eECeHZ7dmP1Eh7ijcxHxBhHHYxiAg/PZue+5dbHr9zU9HgOfxkAUm22YXmMfMjJ58P4D9QN6gihhdGfWcSkAbuFTAzAuGOHW1WMrccKBkApajVOYoQ53MD43JCErKxeIHTiwmJHGJexTnSSQq0utyAAqOWIotGplhB2EnDRg0yqWxYC1iLjOw3OOWQTD3lEqPLFSAgIwZ9V9yLXx8DaPzPvS+RyPq6d1S1jyXJ5xJc8z/s2f1HulaLSKUGl6GwVc10PcpnXWaJ1vnRghDVZBB6tnzdAATooZ2aXYHKpbx1FiMGwYAqDMSjgacdZyaFzWCs/VMUHySBHhSrPhQgdSQ5gFEaVgpC/pG/OFIVecTWtWYkTikE8/ostDLQ4+Zw40T6I5SF264/nwmqw== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000324, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Deepak Gupta This patch selects config shadow stack support and landing pad instr support. Shadow stack support and landing instr support is hidden behind `CONFIG_RISCV_USER_CFI`. Selecting `CONFIG_RISCV_USER_CFI` wires up path to enumerate CPU support and if cpu support exists, kernel will support cpu assisted user mode cfi. Signed-off-by: Deepak Gupta --- arch/riscv/Kconfig | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 9d386e9edc45..437b2f9abf3e 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -163,6 +163,7 @@ config RISCV select SYSCTL_EXCEPTION_TRACE select THREAD_INFO_IN_TASK select TRACE_IRQFLAGS_SUPPORT + select RISCV_USER_CFI select UACCESS_MEMCPY if !MMU select ZONE_DMA32 if 64BIT @@ -182,6 +183,20 @@ config HAVE_SHADOW_CALL_STACK # https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444d769 depends on $(ld-option,--no-relax-gp) +config RISCV_USER_CFI + bool "riscv userspace control flow integrity" + help + Provides CPU assisted control flow integrity to userspace tasks. + Control flow integrity is provided by implementing shadow stack for + backward edge and indirect branch tracking for forward edge in program. + Shadow stack protection is a hardware feature that detects function + return address corruption. This helps mitigate ROP attacks. + Indirect branch tracking enforces that all indirect branches must land + on a landing pad instruction else CPU will fault. This mitigates against + JOP / COP attacks. Applications must be enabled to use it, and old user- + space does not get protection "for free". + default y + config ARCH_MMAP_RND_BITS_MIN default 18 if 64BIT default 8