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Fri, 19 Apr 2024 00:43:55 -0700 (PDT) From: Ryan Roberts To: Catalin Marinas , Will Deacon , Andrew Morton , Shuah Khan , Joey Gouly , Ard Biesheuvel , Mark Rutland , Anshuman Khandual , David Hildenbrand , Shivansh Vij Cc: Ryan Roberts , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org Subject: [PATCH v1 1/5] arm64/mm: Move PTE_PROT_NONE and PMD_PRESENT_INVALID Date: Fri, 19 Apr 2024 08:43:40 +0100 Message-Id: <20240419074344.2643212-2-ryan.roberts@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240419074344.2643212-1-ryan.roberts@arm.com> References: <20240419074344.2643212-1-ryan.roberts@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam05 X-Rspamd-Queue-Id: 02ECC14001C X-Stat-Signature: 13pyp661d8pj3yk9rnmew7zdtzkau6xr X-HE-Tag: 1713512638-774524 X-HE-Meta: U2FsdGVkX1+9ZC9vtdKvzBRu/HYmjhr3J80SbZOkNcJNqFdSVpR0xQ1Mb4ho/0avl96JVvMxQ8YCj9BiGpcGN7l16BiWBEpZtddvFnRbDFC7cIVCp9sXTh5IZG72eWbpYXbmpCpRR1lNENeOa4JoVR1YHM0TOQfzygLbYUfdMZCj0OeyDB1pFvIM6T3xHR9TycSzngH1LRjzG9wUcWs/knFZ77yszooGNl9MojkwaEm1sD4EzdBta81VtdayE4Q4gTs6W5gt+8TAmz0tigdK6ZDbTQASgIGadRW6GJ5Tt6ASaUwX047H8FHb8u3rYOdCrmFVorzZKfw6eGYe+vhSEr1K1IXR6B8zf858I4BRQKUx6iJ0Dz/sbyhmBKMRhhzSG+xDV3DdKxvfQpvF9RzbdHKiJyDQkfIUguRlWYJp5084Z4CqG6DA/XytwhO4Niutb1XIEwMDAmFYkNDyixk7xvXp26RhHdtM7MrEl0AUK6aoOP4mApfXFs/lBUOJnpNuJapAD1Gua87Nvfo1aG+R6AX0M+6y1L7bP+AJLyi4aea3rCMf1mrdaXr5eJD2Eft1O3lnpU47/R5vPAyiJm27A8BXZiC3tvvVAWBIpli+xHz5XFf7FS4QXckNJPN0ounxKd6Z1+ynoCGl17MG82d3sswiNgEcMfwD+7dFVAEwf6guPZoh3ud22RyyYX79ALNW1HBR/hzSxtEy3vQ6YVfRKAcnqfa+JW6kEqc0tdcjlPNP70V/638K5SszqgfiWSvwXdYkecQFj0YpexxoB71h31s4ZjVGM2e4gn0CrT0EWdCRjA1vu5K+l4qVGGzyLR3F5dVEpIFxOdq/ZIbrtRRqRLkWRIuV2szQA58EFC8PsneJUqdnf+UotayCWz0R7HXk5IM4JrvbUaTC0xdFVDRCtoRIUajom1aEOLdFV22FDocK9u5/j3v82j6u0oCeRQmPIdgtdFrohRlm7Tmpfya u24k5y6m H+3LdAVBdMquI0eJJmOHU+872UoW+IILtsPfsanJyw+GsRlKwXN+6sdqLAm5kNnoJi829X6xGMLO7h9sea02OB3tvHoCZJ95jRVwngNOwWaaVGWaSbznDQ16hKC5FVapWvpfnm88C8+QWkkpSA7itYCBw/ikBS8mB4yU4dM8XGH/bbHU0Ce1sHUdzvvAbqOunhYuyLnGh2dE4pvQ= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Previously PTE_PROT_NONE was occupying bit 58, one of the bits reserved for SW use when the PTE is valid. This is a waste of those precious SW bits since PTE_PROT_NONE can only ever be set when valid is clear. Instead let's overlay it on what would be a HW bit if valid was set. We need to be careful about which HW bit to choose since some of them must be preserved; when pte_present() is true (as it is for a PTE_PROT_NONE pte), it is legitimate for the core to call various accessors, e.g. pte_dirty(), pte_write() etc. There are also some accessors that are private to the arch which must continue to be honoured, e.g. pte_user(), pte_user_exec() etc. So we choose to overlay PTE_UXN; This effectively means that whenever a pte has PTE_PROT_NONE set, it will always report pte_user_exec() == false, which is obviously always correct. As a result of this change, we must shuffle the layout of the arch-specific swap pte so that PTE_PROT_NONE is always zero and not overlapping with any other field. As a result of this, there is no way to keep the `type` field contiguous without conflicting with PMD_PRESENT_INVALID (bit 59), which must also be 0 for a swap pte. So let's move PMD_PRESENT_INVALID to bit 60. In the end, this frees up bit 58 for future use as a proper SW bit (e.g. soft-dirty or uffd-wp). Signed-off-by: Ryan Roberts --- arch/arm64/include/asm/pgtable-prot.h | 4 ++-- arch/arm64/include/asm/pgtable.h | 16 +++++++++------- 2 files changed, 11 insertions(+), 9 deletions(-) -- 2.25.1 diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h index dd9ee67d1d87..ef952d69fd04 100644 --- a/arch/arm64/include/asm/pgtable-prot.h +++ b/arch/arm64/include/asm/pgtable-prot.h @@ -18,14 +18,14 @@ #define PTE_DIRTY (_AT(pteval_t, 1) << 55) #define PTE_SPECIAL (_AT(pteval_t, 1) << 56) #define PTE_DEVMAP (_AT(pteval_t, 1) << 57) -#define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */ +#define PTE_PROT_NONE (PTE_UXN) /* Reuse PTE_UXN; only when !PTE_VALID */ /* * This bit indicates that the entry is present i.e. pmd_page() * still points to a valid huge page in memory even if the pmd * has been invalidated. */ -#define PMD_PRESENT_INVALID (_AT(pteval_t, 1) << 59) /* only when !PMD_SECT_VALID */ +#define PMD_PRESENT_INVALID (_AT(pteval_t, 1) << 60) /* only when !PMD_SECT_VALID */ #define _PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED) #define _PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index afdd56d26ad7..23aabff4fa6f 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -1248,20 +1248,22 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma, * Encode and decode a swap entry: * bits 0-1: present (must be zero) * bits 2: remember PG_anon_exclusive - * bits 3-7: swap type - * bits 8-57: swap offset - * bit 58: PTE_PROT_NONE (must be zero) + * bits 4-53: swap offset + * bit 54: PTE_PROT_NONE (overlays PTE_UXN) (must be zero) + * bits 55-59: swap type + * bit 60: PMD_PRESENT_INVALID (must be zero) */ -#define __SWP_TYPE_SHIFT 3 +#define __SWP_TYPE_SHIFT 55 #define __SWP_TYPE_BITS 5 -#define __SWP_OFFSET_BITS 50 #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1) -#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT) +#define __SWP_OFFSET_SHIFT 4 +#define __SWP_OFFSET_BITS 50 #define __SWP_OFFSET_MASK ((1UL << __SWP_OFFSET_BITS) - 1) #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK) #define __swp_offset(x) (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK) -#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) }) +#define __swp_entry(type, offset) ((swp_entry_t) { ((unsigned long)(type) << __SWP_TYPE_SHIFT) | \ + ((unsigned long)(offset) << __SWP_OFFSET_SHIFT) }) #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })