| Message ID | 20240503130147.1154804-13-joey.gouly@arm.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: Permission Overlay Extension | expand |
On Fri, May 03, 2024 at 02:01:30PM +0100, Joey Gouly wrote: > The 3-bit POIndex is stored in the PTE at bits 60..62. > > Signed-off-by: Joey Gouly <joey.gouly@arm.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
On 5/3/24 18:31, Joey Gouly wrote: > The 3-bit POIndex is stored in the PTE at bits 60..62. > > Signed-off-by: Joey Gouly <joey.gouly@arm.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> > --- > arch/arm64/include/asm/pgtable-hwdef.h | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h > index ef207a0d4f0d..370a02922fe1 100644 > --- a/arch/arm64/include/asm/pgtable-hwdef.h > +++ b/arch/arm64/include/asm/pgtable-hwdef.h > @@ -198,6 +198,16 @@ > #define PTE_PI_IDX_2 53 /* PXN */ > #define PTE_PI_IDX_3 54 /* UXN */ > > +/* > + * POIndex[2:0] encoding (Permission Overlay Extension) > + */ > +#define PTE_PO_IDX_0 (_AT(pteval_t, 1) << 60) > +#define PTE_PO_IDX_1 (_AT(pteval_t, 1) << 61) > +#define PTE_PO_IDX_2 (_AT(pteval_t, 1) << 62) > + > +#define PTE_PO_IDX_MASK GENMASK_ULL(62, 60) > + > + > /* > * Memory Attribute override for Stage-2 (MemAttr[3:0]) > */ Could this patch be folded with a later patch that uses the above indices and the mask for the first time.
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index ef207a0d4f0d..370a02922fe1 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -198,6 +198,16 @@ #define PTE_PI_IDX_2 53 /* PXN */ #define PTE_PI_IDX_3 54 /* UXN */ +/* + * POIndex[2:0] encoding (Permission Overlay Extension) + */ +#define PTE_PO_IDX_0 (_AT(pteval_t, 1) << 60) +#define PTE_PO_IDX_1 (_AT(pteval_t, 1) << 61) +#define PTE_PO_IDX_2 (_AT(pteval_t, 1) << 62) + +#define PTE_PO_IDX_MASK GENMASK_ULL(62, 60) + + /* * Memory Attribute override for Stage-2 (MemAttr[3:0]) */
The 3-bit POIndex is stored in the PTE at bits 60..62. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> --- arch/arm64/include/asm/pgtable-hwdef.h | 10 ++++++++++ 1 file changed, 10 insertions(+)